From ffa48f0c945be3c1680b0830d5c0cac146cb954c Mon Sep 17 00:00:00 2001 From: XinWang10 <108658776+XinWang10@users.noreply.github.com> Date: Thu, 29 Feb 2024 11:44:41 +0800 Subject: [X86][MC] Teach disassembler to recognize apx instructions which ignores W bit (#82747) Extended VMX instructions and 8 bit apx extended instructions don't need W bit, they are marked as W ignored in spec. RFC: https://discourse.llvm.org/t/rfc-design-for-apx-feature-egpr-and-ndd-support/73031/4 --- llvm/utils/TableGen/X86DisassemblerTables.cpp | 2 ++ 1 file changed, 2 insertions(+) (limited to 'llvm/utils/TableGen/X86DisassemblerTables.cpp') diff --git a/llvm/utils/TableGen/X86DisassemblerTables.cpp b/llvm/utils/TableGen/X86DisassemblerTables.cpp index a48b9cf..f4d282f 100644 --- a/llvm/utils/TableGen/X86DisassemblerTables.cpp +++ b/llvm/utils/TableGen/X86DisassemblerTables.cpp @@ -567,7 +567,9 @@ static inline bool inheritsFrom(InstructionContext child, case IC_EVEX_L2_W_OPSIZE_KZ_B: return false; case IC_EVEX_NF: + return WIG && inheritsFrom(child, IC_EVEX_W_NF); case IC_EVEX_B_NF: + return WIG && inheritsFrom(child, IC_EVEX_W_B_NF); case IC_EVEX_OPSIZE_NF: case IC_EVEX_OPSIZE_B_NF: case IC_EVEX_W_NF: -- cgit v1.1