From 594b92a7b987b839af10bd1035a816f233033826 Mon Sep 17 00:00:00 2001 From: Michael Maitland Date: Thu, 25 Jan 2024 12:44:36 -0700 Subject: [RISCV] Add Tune to DontSinkSplatOperands (#79199) A CPU may prefer to not sink splat operands, one reason being that it could require a S2V transfer buffer to move scalars into buffers. --- llvm/lib/Target/RISCV/RISCVFeatures.td | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'llvm/lib/Target/RISCV/RISCVFeatures.td') diff --git a/llvm/lib/Target/RISCV/RISCVFeatures.td b/llvm/lib/Target/RISCV/RISCVFeatures.td index 045173b..c822b9c 100644 --- a/llvm/lib/Target/RISCV/RISCVFeatures.td +++ b/llvm/lib/Target/RISCV/RISCVFeatures.td @@ -1074,6 +1074,13 @@ def TuneShortForwardBranchOpt def HasShortForwardBranchOpt : Predicate<"Subtarget->hasShortForwardBranchOpt()">; def NoShortForwardBranchOpt : Predicate<"!Subtarget->hasShortForwardBranchOpt()">; +// Some subtargets require a S2V transfer buffer to move scalars into vectors. +// FIXME: Forming .vx/.vf/.wx/.wf can reduce register pressure. +def TuneNoSinkSplatOperands + : SubtargetFeature<"no-sink-splat-operands", "SinkSplatOperands", + "false", "Disable sink splat operands to enable .vx, .vf," + ".wx, and .wf instructions">; + def TuneConditionalCompressedMoveFusion : SubtargetFeature<"conditional-cmv-fusion", "HasConditionalCompressedMoveFusion", "true", "Enable branch+c.mv fusion">; -- cgit v1.1