From ab1d988e1483895a71dcd257bdcaf6fdb0a83d62 Mon Sep 17 00:00:00 2001 From: Nikita Popov Date: Fri, 19 Apr 2024 13:59:19 +0900 Subject: [InstCombine] Add test for incorrect fshr transform (#89338) --- llvm/test/Transforms/InstCombine/fsh.ll | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/llvm/test/Transforms/InstCombine/fsh.ll b/llvm/test/Transforms/InstCombine/fsh.ll index 6c85169..3bd44ec 100644 --- a/llvm/test/Transforms/InstCombine/fsh.ll +++ b/llvm/test/Transforms/InstCombine/fsh.ll @@ -1001,3 +1001,13 @@ define <2 x i32> @fsh_unary_shuffle_ops_partial_widening(<3 x i32> %x, <2 x i32> %r = call <2 x i32> @llvm.fshr.v2i32(<2 x i32> %a, <2 x i32> %b, <2 x i32> %c) ret <2 x i32> %r } + +; FIXME: This is a miscompile. +define <2 x i32> @fshr_vec_zero_elem(<2 x i32> %x, <2 x i32> %y) { +; CHECK-LABEL: @fshr_vec_zero_elem( +; CHECK-NEXT: [[FSH:%.*]] = call <2 x i32> @llvm.fshl.v2i32(<2 x i32> [[X:%.*]], <2 x i32> [[Y:%.*]], <2 x i32> ) +; CHECK-NEXT: ret <2 x i32> [[FSH]] +; + %fsh = call <2 x i32> @llvm.fshr.v2i32(<2 x i32> %x, <2 x i32> %y, <2 x i32> ) + ret <2 x i32> %fsh +} -- cgit v1.1