From 6b8f29c6972f6eedc587e239f6390256ed075be0 Mon Sep 17 00:00:00 2001 From: Kai Nacke Date: Tue, 5 Jul 2022 18:20:38 -0400 Subject: [m88k] Fix some warnings. --- llvm/lib/Target/M88k/AsmParser/M88kAsmParser.cpp | 16 +++++++++++++--- llvm/lib/Target/M88k/Disassembler/M88kDisassembler.cpp | 4 ++++ llvm/lib/Target/M88k/GISel/M88kInstructionSelector.cpp | 14 +++++++------- llvm/lib/Target/M88k/GISel/M88kLegalizerInfo.cpp | 4 ++-- llvm/lib/Target/M88k/MCTargetDesc/M88kTargetStreamer.cpp | 2 +- llvm/lib/Target/M88k/MCTargetDesc/M88kTargetStreamer.h | 2 +- 6 files changed, 28 insertions(+), 14 deletions(-) diff --git a/llvm/lib/Target/M88k/AsmParser/M88kAsmParser.cpp b/llvm/lib/Target/M88k/AsmParser/M88kAsmParser.cpp index 739a695..68be0c7 100644 --- a/llvm/lib/Target/M88k/AsmParser/M88kAsmParser.cpp +++ b/llvm/lib/Target/M88k/AsmParser/M88kAsmParser.cpp @@ -711,9 +711,19 @@ bool M88kAsmParser::MatchAndEmitInstruction(SMLoc IdLoc, unsigned &Opcode, Inst.setLoc(IdLoc); Out.emitInstruction(Inst, getSTI()); return false; - case Match_MissingFeature: - // Currently no features are implemented. - return Error(IdLoc, "Instruction use requires option to be enabled"); + case Match_MissingFeature: { + assert(MissingFeatures.any() && "Unknown missing features!"); + bool FirstFeature = true; + std::string Msg = "instruction requires the following:"; + for (unsigned i = 0, e = MissingFeatures.size(); i != e; ++i) { + if (MissingFeatures[i]) { + Msg += FirstFeature ? " " : ", "; + Msg += getSubtargetFeatureName(i); + FirstFeature = false; + } + } + return Error(IdLoc, Msg); + } case Match_InvalidOperand: { SMLoc ErrorLoc = IdLoc; if (ErrorInfo != ~0U) { diff --git a/llvm/lib/Target/M88k/Disassembler/M88kDisassembler.cpp b/llvm/lib/Target/M88k/Disassembler/M88kDisassembler.cpp index 930be4c..872c237 100644 --- a/llvm/lib/Target/M88k/Disassembler/M88kDisassembler.cpp +++ b/llvm/lib/Target/M88k/Disassembler/M88kDisassembler.cpp @@ -167,10 +167,12 @@ static DecodeStatus decodeUImmOperand(MCInst &Inst, uint64_t Imm) { return MCDisassembler::Success; } +#if 0 // Not yet used. static DecodeStatus decodeU5ImmOOperand(MCInst &Inst, uint64_t Imm, uint64_t Address, const void *Decoder) { return decodeUImmOperand<5>(Inst, Imm); } +#endif static DecodeStatus decodeU5ImmOperand(MCInst &Inst, uint64_t Imm, uint64_t Address, const void *Decoder) { @@ -193,11 +195,13 @@ static DecodeStatus decodeBitFieldOperand(MCInst &Inst, uint64_t Imm, return decodeUImmOperand<10>(Inst, Imm); } +#if 0 // Not yet used. static DecodeStatus decodeBFWidthOperand(MCInst &Inst, uint64_t Imm, uint64_t Address, const void *Decoder) { return decodeUImmOperand<5>(Inst, Imm); } +#endif static DecodeStatus decodeBFOffsetOperand(MCInst &Inst, uint64_t Imm, uint64_t Address, diff --git a/llvm/lib/Target/M88k/GISel/M88kInstructionSelector.cpp b/llvm/lib/Target/M88k/GISel/M88kInstructionSelector.cpp index bda6bdf..8fe63bc 100644 --- a/llvm/lib/Target/M88k/GISel/M88kInstructionSelector.cpp +++ b/llvm/lib/Target/M88k/GISel/M88kInstructionSelector.cpp @@ -76,7 +76,7 @@ private: bool selectIntrinsic(MachineInstr &I, MachineBasicBlock &MBB, MachineRegisterInfo &MRI); - const M88kTargetMachine &TM; + //const M88kTargetMachine &TM; const M88kInstrInfo &TII; const M88kRegisterInfo &TRI; const M88kRegisterBankInfo &RBI; @@ -104,7 +104,7 @@ private: M88kInstructionSelector::M88kInstructionSelector( const M88kTargetMachine &TM, const M88kSubtarget &STI, const M88kRegisterBankInfo &RBI) - : InstructionSelector(), TM(TM), TII(*STI.getInstrInfo()), + : InstructionSelector(), /*TM(TM),*/ TII(*STI.getInstrInfo()), TRI(*STI.getRegisterInfo()), RBI(RBI), #define GET_GLOBALISEL_PREDICATES_INIT @@ -338,11 +338,11 @@ bool M88kInstructionSelector::selectICmp(MachineInstr &I, if (!constrainSelectedInstRegOperands(*MI, TII, TRI, RBI)) return false; - int64_t WO = 1 << 5 | int64_t(CCCode); - MI = BuildMI(MBB, I, I.getDebugLoc(), TII.get(M88k::EXTUrwo)) - .add(I.getOperand(0)) - .addReg(Temp, RegState::Kill) - .addImm(WO); + int64_t WO = 1 << 5 | int64_t(CCCode); + MI = BuildMI(MBB, I, I.getDebugLoc(), TII.get(M88k::EXTUrwo)) + .add(I.getOperand(0)) + .addReg(Temp, RegState::Kill) + .addImm(WO); I.eraseFromParent(); return constrainSelectedInstRegOperands(*MI, TII, TRI, RBI); diff --git a/llvm/lib/Target/M88k/GISel/M88kLegalizerInfo.cpp b/llvm/lib/Target/M88k/GISel/M88kLegalizerInfo.cpp index 5cdee34..f171eec 100644 --- a/llvm/lib/Target/M88k/GISel/M88kLegalizerInfo.cpp +++ b/llvm/lib/Target/M88k/GISel/M88kLegalizerInfo.cpp @@ -152,8 +152,8 @@ bool M88kLegalizerInfo::legalizeCustom(LegalizerHelper &Helper, Register FVal = MI.getOperand(3).getReg(); LLT DstTy = MRI.getType(Dst); LLT TstTy = MRI.getType(Tst); - LLT TValTy = MRI.getType(TVal); - LLT FValy = MRI.getType(FVal); + //LLT TValTy = MRI.getType(TVal); + //LLT FValy = MRI.getType(FVal); if (TstTy != S1) return false; if (DstTy != S32 && DstTy != S64) diff --git a/llvm/lib/Target/M88k/MCTargetDesc/M88kTargetStreamer.cpp b/llvm/lib/Target/M88k/MCTargetDesc/M88kTargetStreamer.cpp index a9f11cd..c662ee2 100644 --- a/llvm/lib/Target/M88k/MCTargetDesc/M88kTargetStreamer.cpp +++ b/llvm/lib/Target/M88k/MCTargetDesc/M88kTargetStreamer.cpp @@ -36,7 +36,7 @@ void M88kTargetAsmStreamer::emitDirectiveRequires881100() { M88kTargetELFStreamer::M88kTargetELFStreamer(MCStreamer &S, const MCSubtargetInfo &STI) - : M88kTargetStreamer(S), STI(STI), Streamer(S), + : M88kTargetStreamer(S), /*STI(STI),*/ Streamer(S), Requires88110(STI.getCPU() == "mc88110") {} MCELFStreamer &M88kTargetELFStreamer::getStreamer() { diff --git a/llvm/lib/Target/M88k/MCTargetDesc/M88kTargetStreamer.h b/llvm/lib/Target/M88k/MCTargetDesc/M88kTargetStreamer.h index 74d16a0..e3e4ff0 100644 --- a/llvm/lib/Target/M88k/MCTargetDesc/M88kTargetStreamer.h +++ b/llvm/lib/Target/M88k/MCTargetDesc/M88kTargetStreamer.h @@ -34,7 +34,7 @@ public: }; class M88kTargetELFStreamer : public M88kTargetStreamer { - const MCSubtargetInfo &STI; + //const MCSubtargetInfo &STI; MCStreamer &Streamer; bool Requires88110; -- cgit v1.1