From 47ea0e89486918fec7603aea838b83bc90853a2a Mon Sep 17 00:00:00 2001 From: Kai Nacke Date: Sun, 18 Sep 2022 20:30:57 -0400 Subject: [m88k] Try to use a tree matcher in combiner. llvm-tblgen crahes when using more than 2 instructions. :-( --- llvm/lib/Target/M88k/GISel/M88kPostLegalizerCombiner.cpp | 2 +- llvm/lib/Target/M88k/M88kCombine.td | 12 +++++++----- 2 files changed, 8 insertions(+), 6 deletions(-) diff --git a/llvm/lib/Target/M88k/GISel/M88kPostLegalizerCombiner.cpp b/llvm/lib/Target/M88k/GISel/M88kPostLegalizerCombiner.cpp index adb63b19..a20659a 100644 --- a/llvm/lib/Target/M88k/GISel/M88kPostLegalizerCombiner.cpp +++ b/llvm/lib/Target/M88k/GISel/M88kPostLegalizerCombiner.cpp @@ -226,7 +226,7 @@ bool matchSubAddFromSubICmp(MachineInstr &MI, MachineRegisterInfo &MRI, // Match // Unused, CarryBit = G_USUBU SrcB, SrcC // Carry = G_ZEXT CarryBit -// Dst = G_UADD SrcA, Carry +// Dst = G_ADD SrcA, Carry // The returned MatchInfo transforms this sequence into // Unused, Carry = G_USUBU SrcB, SrcC // Dst, UnusedCarry = G_UADDE SrcA, Zero, Carry diff --git a/llvm/lib/Target/M88k/M88kCombine.td b/llvm/lib/Target/M88k/M88kCombine.td index c2d4456..d11e930 100644 --- a/llvm/lib/Target/M88k/M88kCombine.td +++ b/llvm/lib/Target/M88k/M88kCombine.td @@ -98,15 +98,17 @@ def subsub_from_subicmp : GICombineRule< // Dst, UnusedCarry = G_USUBE SrcA, Zero, Carry // with SrcB' and SrcC' derived from SrcB and SrcC. def subadd_from_subicmp : GICombineRule< - (defs root:$root, build_fn_matchinfo:$matchinfo), - (match (wip_match_opcode G_SUB):$root, - [{ return matchSubAddFromSubICmp(*${root}, MRI, ${matchinfo}); }]), - (apply [{ Helper.applyBuildFn(*${root}, ${matchinfo}); }])>; + (defs root:$dst, build_fn_matchinfo:$matchinfo), + (match //(G_ICMP $icmp, $cc, $src2, $src3), + (G_ZEXT $zext, $icmp), + (G_SUB $dst, $src1, $zext):$submi, + [{ return matchSubAddFromSubICmp(*${submi}, MRI, ${matchinfo}); }]), + (apply [{ Helper.applyBuildFn(*${submi}, ${matchinfo}); }])>; // Combine // Unused, CarryBit = G_USUBU SrcB, SrcC // Carry = G_ZEXT CarryBit -// Dst = G_UADD SrcA, Carry +// Dst = G_ADD SrcA, Carry // into the instruction sequence // Unused, Carry = G_USUBO SrcB, SrcC // Dst, UnusedCarry = G_UADDE SrcA, Zero, Carry -- cgit v1.1