From 2daa95a6fe1e51fb2c42a700dc2d3661ffd3c638 Mon Sep 17 00:00:00 2001
From: Kai Nacke <kai@redstar.de>
Date: Sat, 2 Jul 2022 16:56:35 -0400
Subject: [m88k] Add more patterns for constants

---
 .../Target/M88k/GISel/M88kInstructionSelector.cpp  | 24 ++++++++++
 llvm/lib/Target/M88k/M88kInstrInfo.td              |  7 ++-
 llvm/test/CodeGen/M88k/constant.ll                 | 52 ++++++++++++++++------
 3 files changed, 69 insertions(+), 14 deletions(-)

diff --git a/llvm/lib/Target/M88k/GISel/M88kInstructionSelector.cpp b/llvm/lib/Target/M88k/GISel/M88kInstructionSelector.cpp
index acc3deae..bda6bdf 100644
--- a/llvm/lib/Target/M88k/GISel/M88kInstructionSelector.cpp
+++ b/llvm/lib/Target/M88k/GISel/M88kInstructionSelector.cpp
@@ -675,6 +675,30 @@ bool M88kInstructionSelector::earlySelect(MachineInstr &I) {
   auto &MRI = MF.getRegInfo();
 
   switch (I.getOpcode()) {
+  case TargetOpcode::G_CONSTANT: {
+    // Only handle negative 32bit values between -1 and -65536.
+    // Other constants are handled by TableGen.
+    APInt ConstValue = I.getOperand(1).getCImm()->getValue();
+    if (ConstValue.isSignedIntN(32)) {
+      int64_t Cst = ConstValue.getSExtValue();
+      if (Cst < 0 && Cst >= -65536) {
+        MachineInstr *MI;
+        if (Cst == -65536)
+          MI = BuildMI(MBB, I, I.getDebugLoc(), TII.get(M88k::SETrwo),
+                       I.getOperand(0).getReg())
+                   .addReg(M88k::R0)
+                   .addImm((16 << 5)|16 /*16<16>*/);
+        else
+          MI = BuildMI(MBB, I, I.getDebugLoc(), TII.get(M88k::SUBUri),
+                       I.getOperand(0).getReg())
+                   .addReg(M88k::R0)
+                   .addImm(-Cst);
+        I.eraseFromParent();
+        return constrainSelectedInstRegOperands(*MI, TII, TRI, RBI);
+      }
+    }
+    return false;
+  }
   case TargetOpcode::G_AND:
   case TargetOpcode::G_OR: {
     // Lower
diff --git a/llvm/lib/Target/M88k/M88kInstrInfo.td b/llvm/lib/Target/M88k/M88kInstrInfo.td
index 488c0d4..2ba33fb 100644
--- a/llvm/lib/Target/M88k/M88kInstrInfo.td
+++ b/llvm/lib/Target/M88k/M88kInstrInfo.td
@@ -333,9 +333,14 @@ def : Pat<(or GPR:$rs1, uimm32:$imm),
 def : Pat<(xor GPR:$rs1, uimm32:$imm),
           (XORri (XORriu GPR:$rs1, (HI16 i32:$imm)), (LO16 i32:$imm))>;
 
+// Zero immediate.
+def : Pat<(i32 0),
+          (ORri (i32 R0), 0)>;
+
 // Arbitrary constants.
 // 16-bit immediate.
-def : Pat<(i32 imm32lo16:$imm), (ORri (i32 R0), imm32lo16:$imm)>;
+def : Pat<(i32 imm32lo16:$imm), (ORri (i32 R0), (LO16 i32:$imm))>;
+def : Pat<(i32 imm32hi16:$imm), (ORriu (i32 R0), (HI16 i32:$imm))>;
 
 // Arbitrary immediate.
 def : Pat<(i32 imm:$imm),
diff --git a/llvm/test/CodeGen/M88k/constant.ll b/llvm/test/CodeGen/M88k/constant.ll
index 0615809..f7ea8c0 100644
--- a/llvm/test/CodeGen/M88k/constant.ll
+++ b/llvm/test/CodeGen/M88k/constant.ll
@@ -31,15 +31,43 @@ define i32 @f4() {
   ret i32 1
 }
 
-define zeroext i16 @f5() {
+define i32 @f5() {
 ; CHECK-LABEL: f5:
-; CHECK: or %r2, %r0, 51966
+; CHECK: or.u %r2, %r0, 1
 ; CHECK: jmp %r1
-  ret i16 51966 ; 0xcafe
+  ret i32 65536 ; 0x10000
 }
 
 define i32 @f6() {
 ; CHECK-LABEL: f6:
+; CHECK: subu %r2, %r0, 1
+; CHECK: jmp %r1
+  ret i32 -1
+}
+
+define i32 @f7() {
+; CHECK-LABEL: f7:
+; CHECK: subu %r2, %r0, 65535
+; CHECK: jmp %r1
+  ret i32 -65535
+}
+
+define i32 @f8() {
+; CHECK-LABEL: f8:
+; CHECK: set %r2, %r0, 16<16>
+; CHECK: jmp %r1
+  ret i32 -65536
+}
+
+define zeroext i16 @f9() {
+; CHECK-LABEL: f9:
+; CHECK: or %r2, %r0, 51966
+; CHECK: jmp %r1
+  ret i16 51966 ; 0xcafe
+}
+
+define i32 @f10() {
+; CHECK-LABEL: f10:
 ; 51966 = 0xcafe, 47806 = 0xbabe
 ; CHECK: or.u %r2, %r0, 51966
 ; CHECK: or %r2, %r2, 47806
@@ -47,26 +75,24 @@ define i32 @f6() {
   ret i32 3405691582 ; 0xcafebabe
 }
 
-; TODO The coding is correct, but suboptimal.
-define i64 @f7() {
-; CHECK-LABEL: f7:
+define i64 @f11() {
+; CHECK-LABEL: f11:
 ; CHECK: or %r3, %r0, 0
 ; CHECK: or %r2, %r0, 0
 ; CHECK: jmp %r1
   ret i64 0
 }
 
-; TODO The coding is correct, but suboptimal.
-define i64 @f8() {
-; CHECK-LABEL: f8:
+define i64 @f12() {
+; CHECK-LABEL: f12:
 ; CHECK: or %r3, %r0, 1
 ; CHECK: or %r2, %r0, 0
 ; CHECK: jmp %r1
   ret i64 1
 }
 
-define i64 @f9() {
-; CHECK-LABEL: f9:
+define i64 @f13() {
+; CHECK-LABEL: f13:
 ; 51966 = 0xcafe, 47806 = 0xbabe
 ; CHECK: or.u %r2, %r0, 51966
 ; CHECK: or   %r3, %r2, 47806
@@ -75,8 +101,8 @@ define i64 @f9() {
   ret i64 3405691582 ; 0xcafebabe
 }
 
-define i64 @f10() {
-; CHECK-LABEL: f10:
+define i64 @f14() {
+; CHECK-LABEL: f14:
 ; 57005 = 0xdead, 48879 = 0xbeef
 ; 51966 = 0xcafe, 47806 = 0xbabe
 ; CHECK: or.u %r2, %r0, 51966
-- 
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