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2020-10-02[mlir] Fix call op conversion in bare-ptr calling conventionDiego Caballero1-0/+30
2020-09-30[mlir][Linalg] Tile sizes for Conv ops vectorization added as pass argumentsJakub Lichman1-1/+1
2020-09-29[mlir] Support return and call ops in bare-ptr calling conventionDiego Caballero1-10/+38
2020-09-28[mlir][shape] Make conversion passes more consistent.Sean Silva2-35/+32
2020-09-28[mlir] [VectorOps] changes to printing support for integersAart Bik1-42/+52
2020-09-25[mlir] [VectorOps] generalize printing support for integersAart Bik1-3/+82
2020-09-25[mlir][SCFToGPU] LaunchOp propagate optional attributesArtur Bialas1-0/+13
2020-09-24[mlir][shape] Start a pass that lowers shape constraints.Sean Silva1-0/+44
2020-09-24[mlir] Stop allowing LLVMType Int arguments for GPULaunchFuncOp.Alexander Belyaev1-23/+37
2020-09-22[mlir][Linalg] Uniformize linalg.generic with named ops.Nicolas Vasilache1-16/+16
2020-09-21[mlir][VectorOps] Loosen restrictions on vector.reduction typesBenjamin Kramer1-0/+20
2020-09-18[mlir][StandardToSPIRV] Handle vector of i1 case for lowering zexti to SPIR-V.Hanhan Wang1-0/+9
2020-09-18[mlir][Linalg] Evolve named ops to use assembly form and support linalg on te...Nicolas Vasilache1-1/+2
2020-09-17[mlir][Linalg] Convolution tiling added to ConvOp vectorization passJakub Lichman1-159/+44
2020-09-15[mlir] check for failures when packing function sigunatures in std->llvm conv...Alex Zinenko1-0/+4
2020-09-14Add support for casting elements in vectors for certain Std dialect type conv...Lubomir Litchev1-0/+71
2020-09-14[mlir] Check for type conversion success in std->llvm function conversionAlex Zinenko1-0/+5
2020-09-11[mlir] Fix some edge cases around 0-element TensorFromElementsOpSean Silva1-0/+24
2020-09-10[mlir] [VectorOps] Enable 32-bit index optimizationsaartbik1-24/+27
2020-09-09[MLIR][Shape] Lower `shape_of` to `dynamic_tensor_from_elements`Frederik Gossen1-8/+5
2020-09-09[MLIR][Standard] Update `tensor_from_elements` assembly formatFrederik Gossen1-3/+3
2020-09-08[mlir][VectorOps] Redo the scalar loop emission in VectoToSCF to pad instead ...Benjamin Kramer1-69/+28
2020-09-08[mlir] Conv ops vectorization passJakub Lichman1-0/+167
2020-09-08[mlir][Vector] Make VectorToSCF deterministicNicolas Vasilache1-2/+2
2020-09-07[MLIR][Shape] Merge `shape` to `std`/`scf` lowerings.Frederik Gossen2-172/+171
2020-09-07Revert "[MLIR][Shape] Merge `shape` to `std`/`scf` lowerings."David Truby2-171/+172
2020-09-07[MLIR] Fix Win test due to partial order of CHECK directivesNicolas Vasilache1-4/+4
2020-09-07[MLIR][Shape] Merge `shape` to `std`/`scf` lowerings.Frederik Gossen2-172/+171
2020-09-07[mlir][Vector] Revisit VectorToSCF.Nicolas Vasilache2-18/+19
2020-09-03[mlir] [VectorOps] Improve SIMD compares with narrower indicesaartbik2-9/+57
2020-09-03[spirv][nfc] Simplify resource limit with default valuesLei Zhang8-183/+52
2020-09-03[mlir][VectorOps] Fall back to a loop when accessing a vector from a strided ...Benjamin Kramer1-0/+25
2020-09-02[mlir][VectorToSCF] 128 byte alignment of alloc opsJakub Lichman1-2/+2
2020-08-27[OpenMP][MLIR] Conversion pattern for OpenMP to LLVMKiran Chandramohan1-0/+30
2020-08-27[MLIR][GPUToSPIRV] Passing gpu module name to SPIR-V moduleGeorge Mitenkov4-15/+15
2020-08-27[MLIR][SPIRVToLLVM] Added a hook for descriptor set / binding encodingGeorge Mitenkov1-1/+23
2020-08-26[mlir] NFC: fix typo in FileCheck prefixKazuaki Ishizaki1-1/+1
2020-08-21[mlir][GPUToVulkan] Fix signature of bindMemRef function for f16Thomas Raoux1-0/+2
2020-08-21[MLIR][SPIRVToLLVM] Removed std to llvm patterns from the conversionGeorge Mitenkov12-383/+383
2020-08-19Implement FPToUI and UIToFP ops in standard dialectMars Saxman1-1/+30
2020-08-19[mlir][VectorToSCF] Bug in TransferRead lowering fixedJakub Lichman1-0/+57
2020-08-18Added std.floor operation to match std.ceilRob Suderman4-0/+53
2020-08-18[MLIR][SPIRVToLLVM] Additional conversions for spirv-runnerGeorge Mitenkov4-10/+51
2020-08-17[mlir] do not use llvm.cmpxchg with floatsAlex Zinenko1-16/+16
2020-08-17[mlir] Move data layout from LLVMDialect to module Op attributesAlex Zinenko1-0/+6
2020-08-14[mlir] do not emit bitcasts between structs in StandardToLLVMAlex Zinenko1-7/+7
2020-08-12[MLIR][SPIRVToLLVM] Conversion for global and addressofGeorge Mitenkov1-0/+20
2020-08-10[MLIR] Make gpu.launch_func rewrite pattern part of the LLVM lowering pass.Christian Sigg1-2/+2
2020-08-10[mlir][vector] Relax transfer_read/transfer_write restriction on memref operandThomas Raoux1-0/+18
2020-08-07[mlir][spirv] Add correct handling of Kernel and Addresses capabilitiesKonrad Dobros1-0/+32
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