| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2024-03-26 | [X86] Fix miscompile in combineShiftRightArithmetic (#86597) | Björn Pettersson | 2 | -21/+21 |
| 2024-03-26 | [X86] Pre-commit test case for bug in combineShiftRightArithmetic | Bjorn Pettersson | 1 | -0/+44 |
| 2024-03-26 | [DebugInfo] [SelectionDAG] Fix handling of duplicate dbg values (#86598) | Emil Pedersen | 2 | -1/+69 |
| 2024-03-26 | [flang][OpenMP] Make OpenMP clause representation language-agnostic (#86289) | Krzysztof Parzyszek | 1 | -0/+1123 |
| 2024-03-26 | [RISCV] Split compound if statement to fix a crash. | Craig Topper | 1 | -1/+4 |
| 2024-03-26 | [IR] Add `m_c_BitwiseLogic` in pattern match; NFC | Noah Goldstein | 2 | -3/+52 |
| 2024-03-26 | [DAG] foldAddSubBoolOfMaskedVal - reuse existing SDLoc instead of regeneratin... | Simon Pilgrim | 1 | -4/+4 |
| 2024-03-26 | [SLP]Fix PR86620: check final minbitwidth for truncs/exts before | Alexey Bataev | 3 | -10/+10 |
| 2024-03-26 | [SLP][NFC]Add a test with truncated loads, but incorrect trunc after | Alexey Bataev | 1 | -0/+41 |
| 2024-03-26 | [CodeGen] Add nneg and disjoint flags (#86650) | Thorsten Schütt | 8 | -2/+173 |
| 2024-03-26 | [RISCV] Remove unneeded VAESKF_MV_I tablegen class. NFC | Craig Topper | 1 | -11/+3 |
| 2024-03-26 | [SLP]Do not propagate nuw/nsw flags for alt nodes, affected by | Alexey Bataev | 2 | -6/+6 |
| 2024-03-26 | [unittests] Fix `TableGenTests` with `LLVM_LINK_LLVM_DYLIB` (#86664) | Jonas Hahnfeld | 1 | -1/+1 |
| 2024-03-26 | [RISCV] Remove unnecessary overrides of a defaulted template argument. NFC | Craig Topper | 1 | -4/+4 |
| 2024-03-26 | [DXIL] Implement log intrinsic Lowering (#86569) | Farzon Lotfi | 7 | -2/+147 |
| 2024-03-26 | [X86] extractelement-load.ll - add test case for #85419 | Simon Pilgrim | 1 | -0/+41 |
| 2024-03-26 | [X86] extractelement-load.ll - use X86 instead of X32 check prefix. NFC | Simon Pilgrim | 1 | -141/+141 |
| 2024-03-26 | [ARM][MC] Add GNU Alias for ldrexd, ldaexd, stlexd, and strexd instructions (... | Alfie Richards | 4 | -23/+67 |
| 2024-03-26 | Change type of DiagnosticHandlerTy (#86504) | Abhin P Jose | 3 | -4/+4 |
| 2024-03-26 | [RISCV] Combine (mul (zext, zext)) -> (zext (mul (zext, zext))) (#86465) | Luke Lau | 3 | -76/+64 |
| 2024-03-26 | [X86] combineConcatVectorOps - concatenate FADD/FSUB/FMUL ops if we don't inc... | Simon Pilgrim | 4 | -64/+127 |
| 2024-03-26 | [X86] Add fadd/fsub/fmul tests showing failure to concat operands together an... | Simon Pilgrim | 3 | -12/+210 |
| 2024-03-26 | [VPlan] Explicitly handle scalar pointer inductions. (#83068) | Florian Hahn | 23 | -733/+782 |
| 2024-03-26 | [TBAA] Tests for invalid tbaa.struct metadata (#86167) | Julian Nagele | 1 | -0/+40 |
| 2024-03-26 | Revert "[CodeGen][arm64e] Add methods and data members to Address, which are ... | Akira Hatanaka | 1 | -1/+0 |
| 2024-03-26 | Update documentation and release notes for llvm-profgen COFF support (#84864) | Tim Creech | 1 | -0/+5 |
| 2024-03-26 | [GlobalISel] Add Knownbits for G_LOAD/ZEXTLOAD/SEXTLOAD with range metadata (... | David Green | 3 | -22/+93 |
| 2024-03-26 | [SLP]Fix PR80027: include initial trunc nodes to the demoted values. | Alexey Bataev | 3 | -12/+56 |
| 2024-03-26 | [Intrinsics] Make `patchpoint.i64` generic on its return type (#85911) | Il-Capitano | 11 | -30/+404 |
| 2024-03-26 | [PatternMatch] Refactor `m_SpecificInt` to avoid constructing APInt. NFC. (#8... | Yingwei Zheng | 1 | -10/+25 |
| 2024-03-26 | [LLVM] Remove nuw neg (#86295) | Yingwei Zheng | 14 | -52/+37 |
| 2024-03-26 | [AArch64][SME] Add coalescer barrier for args/results in locally streaming fu... | Sander de Smalen | 5 | -35/+168 |
| 2024-03-26 | [Mips] ctpop.mir - regenerate checks to improve codegen diff in #86505 | Simon Pilgrim | 1 | -62/+64 |
| 2024-03-26 | [DAG] Update ISD::AVG folds to use hasOperation to allow Custom matching prio... | Simon Pilgrim | 2 | -94/+57 |
| 2024-03-26 | [X86] ICX - vector XMM splat use Port 1 or 5 when boradcasting the shift amount | Simon Pilgrim | 4 | -56/+56 |
| 2024-03-26 | [SPIR-V] Extend SPIRVUsage.rst document (#84744) | Michal Paszkowski | 1 | -7/+327 |
| 2024-03-26 | [SPIR-V] Support extension toggling and enabling all (#85503) | Michal Paszkowski | 53 | -130/+235 |
| 2024-03-26 | [DAG] Fold insert_subvector(N0, extract_subvector(N0, N2), N2) --> N0 (#86487) | Simon Pilgrim | 3 | -393/+380 |
| 2024-03-26 | Revert "Update amdgpu_gfx functions to use s0-s3 for inreg SGPR arguments on ... | Thomas Symalla | 12 | -2061/+2552 |
| 2024-03-26 | [AArch64][GlobalISel] Legalization for small anyext/sext/zext (#86438) | David Green | 16 | -313/+714 |
| 2024-03-26 | [SCCIterator] Union MST node by rank correctly (#86389) | XChy | 1 | -3/+3 |
| 2024-03-26 | [GlobalISel] Add CTLZ known bits. (#86436) | David Green | 3 | -6/+13 |
| 2024-03-26 | [ExpandLargeFpConvert] Fix incorrect values in fp-to-int conversion. (#86514) | Bevin Hansson | 4 | -225/+218 |
| 2024-03-25 | [RISCV][TTI] Fix missing return in the end of function | ShihPo Hung | 1 | -0/+1 |
| 2024-03-26 | [RISCV][TTI] Refactor getCastInstrCost to exit early (#86619) | Shih-Po Hung | 1 | -68/+65 |
| 2024-03-25 | AMDGPU: Simplify SMInstruction definitions, NFC (#86613) | Changpeng Fang | 1 | -12/+1 |
| 2024-03-25 | [RISCV] Enable sub(max, min) lowering for ABDS and ABDU (#86592) | Philip Reames | 4 | -474/+257 |
| 2024-03-25 | [RISCV] Rename Binary->Ternary and Unary->Binary for some cases in RISCVInstr... | Craig Topper | 1 | -14/+14 |
| 2024-03-25 | [RISCV] Use inheritance instead of instantiating multiclasses inside another ... | Craig Topper | 1 | -4/+2 |
| 2024-03-26 | [CodeExtractor] Resolving the Inconsistency of Compiled Binary Files (#86497) | dong jianqiang | 2 | -3/+3 |
