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2020-09-26Internalize functions from various tools. NFCFangrui Song15-60/+57
2020-09-26[NFC][PowerPC] Change PPCSubTarget (introduced from D87671) to SubtargetAmy Kwan1-1/+1
2020-09-26[ConstraintElimination] Internalize function/class and delete an implied cond...Fangrui Song1-3/+5
2020-09-26[X86] Add 64-bit target testsSimon Pilgrim1-19/+37
2020-09-26[InstCombine] Add basic vector test coverage for icmp_eq/ne zero combinesSimon Pilgrim1-0/+164
2020-09-26Revert "[DSE] Switch to MemorySSA-backed DSE by default."Florian Hahn76-118/+108
2020-09-26[gn build] update TODONico Weber1-0/+2
2020-09-26[X86] Cleanup check-prefixes for vector-mul.ll testsSimon Pilgrim1-786/+609
2020-09-26[DAG] Fold vector mul(x,0)/mul(x,1) to a clearing maskSimon Pilgrim8-804/+649
2020-09-26MachineCSE.cpp - use auto const& iterators in for-range loops to avoid copies...Simon Pilgrim1-2/+2
2020-09-26[TableGen] Add/edit Doxygen comments to match "TableGen Backend Developer's G...Paul C. Anagnostopoulos2-42/+47
2020-09-26[DSE] Unify & fix mem terminator location checks.Florian Hahn2-9/+18
2020-09-26[DSE] Add tests with lifetime.end that only mark parts of the obj as dead.Florian Hahn1-7/+125
2020-09-26[LoopDelete][Assume] Allow deleting loops with assumesTyker2-1/+43
2020-09-26[CodeGen] Do not call `emitGlobalConstantLargeInt` for constant requires 8 by...Simon Atanasyan2-1/+19
2020-09-26[SelectionDAG] Add guard to automatically insert flagsQiu Chaofan4-224/+285
2020-09-25[bindings/go] Fix TestAttributes after D88241Fangrui Song1-1/+0
2020-09-26Common code preparation for tblgen-types patchJohn Demme2-4/+39
2020-09-25[AArch64][GlobalISel] If a G_BUILD_VECTOR operands are all G_CONSTANT then as...Amara Emerson3-4/+49
2020-09-25[LowerTypeTests][NewPM] Add constructor that uses command line flagsArthur Eubanks4-7/+16
2020-09-25[AArch64][GlobalISel] Add a few more vector type combinations for shift selec...Amara Emerson2-0/+71
2020-09-25[RISCV] Scheduler description for BulletMichael Collison3-0/+230
2020-09-25[Object][MachO] Refine the interface of SliceAlexander Shaposhnikov4-35/+32
2020-09-25[IR] Improve the description for Constant::isNormalFP to list all things that...Craig Topper1-2/+3
2020-09-25[RISCV] Fix formatting (NFC)Evandro Menezes3-5/+3
2020-09-26[LangRef] Clarify the behavior of memory access instructions when pointers/si...Juneyoung Lee1-4/+38
2020-09-25C API: functions to get mask of a ShuffleVectorCraig Disselkoen5-17/+119
2020-09-25[TRE][NFC] Refactor Basic Block ProcessingLayton Kifer1-82/+56
2020-09-25[AArch64][SVE] Drop "argmemonly" from gather/scatter with vector base.Eli Friedman2-2/+51
2020-09-25Revert "[IRSim] Adding basic implementation of llvm-sim."Andrew Litteken8-324/+0
2020-09-25Fix copy+paste typo in doxygen parameter name to fix Wdocumentation. NFCI.Simon Pilgrim1-1/+1
2020-09-25[InstCombine] matchRotate - support (uniform) constant rotation amounts (PR46...Simon Pilgrim5-52/+38
2020-09-25[InstCombine] Fix test name to match type. NFCI.Simon Pilgrim1-2/+2
2020-09-25[IRSim] Adding basic implementation of llvm-sim.Andrew Litteken8-0/+324
2020-09-25[InstCombine] collectBitParts - add fshl/fshr handlingSimon Pilgrim2-12/+37
2020-09-25[LoopReroll][NewPM] Port -loop-reroll to NPMArthur Eubanks7-23/+75
2020-09-25Add a verifier check that rejects non-distinct DISubprogram functionAdrian Prantl3-1/+21
2020-09-25[WebAssembly] Check features before making SjLj vars thread-localThomas Lively6-19/+46
2020-09-25[Coroutine] Split PHI Nodes in `cleanuppad` blocks in a way that obeys EH pad...Daniel Paoliello2-15/+236
2020-09-25OpaquePtr: Add type to sret attributeMatt Arsenault26-65/+191
2020-09-25[SCEV] Add support for `x != 0` to CollectCondition.Florian Hahn2-1/+7
2020-09-25[SCEV] Add another test using info from loop guards for BTC with NE.Florian Hahn1-0/+26
2020-09-25Move PassBuilder::registerParseTopLevelPipelineCallback out-of-lineHans Wennborg2-3/+7
2020-09-25Revert "Add a verifier check that rejects non-distinct DISubprogram function"Adrian Prantl3-21/+1
2020-09-25AArch64/GlobalISel: Narrow stack passed argument access sizeMatt Arsenault2-2/+33
2020-09-25Fix Assembler/disubprogram.ll after e17f52d623cc146b7d9bf5a2e02965043508b4c4Fangrui Song1-2/+2
2020-09-25[PowerPC] Add accumulator register class and instructionsBaptiste Saleil8-4/+114
2020-09-25Fix DISubprogram-v4.ll after e17f52d623cc146b7d9bf5a2e02965043508b4c4Fangrui Song2-2/+2
2020-09-25[AArch64][GlobalISel] Add selection support for <8 x s16> G_INSERT_VECTOR_EL...Amara Emerson2-1/+30
2020-09-25[SCEV] Add support for `x == constant` to CollectCondition.Florian Hahn2-1/+5
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