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2023-12-05[SystemZ] Properly support 16 byte atomic int/fp types and ops. (#73134)Jonas Paulsson3-61/+478
2023-12-05[SCEV] Use or disjoint flag (#74467)Nikita Popov2-9/+40
2023-12-05[RISCV] Optimize VRELOAD/VSPILL lowering if VLEN is known. (#74421)Craig Topper3-12/+260
2023-12-05[ARM][AArch64] Use SelectionDAG::SplitScalar to simplify some code. (#74411)Craig Topper2-8/+2
2023-12-05[DebugInfo][RemoveDIs] Avoid leaking trailing DPMarkers (#74458)Jeremy Morse1-1/+9
2023-12-05[X86] combineStore - add early out for 32-bit f64 store combines. NFC.Simon Pilgrim1-4/+7
2023-12-05[RISCV] Use iXLen for ptr<->int casts in vararg.ll. NFCCraig Topper1-30/+13
2023-12-05[LAA] Fix incorrect dependency classification. (#70819)Alexandros Lamprineas3-14/+73
2023-12-05[VPlan] Add disjoint flag to VPRecipeWithIRFlags. (#74364)Florian Hahn7-6/+24
2023-12-05[RISCV] Use iXLen for ptr<->int casts in vararg.ll (#74426)Craig Topper1-39/+24
2023-12-05[InstCombine] Use disjoint flag in mul of or foldNikita Popov2-3/+24
2023-12-05[LV]Support dropping of nneg flag for zext widencast recipes. (#74112)Alexey Bataev6-8/+150
2023-12-05[InstCombine] Use disjoint flag in add of or foldNikita Popov3-4/+36
2023-12-05[DebugInfo][RemoveDIs] Cope with instructions moving after themselves (#74113)Jeremy Morse2-2/+75
2023-12-05[InstCombine] Use disjoint flag instead of haveNoCommonBitsSet()Nikita Popov3-9/+17
2023-12-05[Tests] Add disjoint flag to some tests (NFC)Nikita Popov96-627/+627
2023-12-05[X86]fold-pcmpeqd-2.ll - replace X32 check prefix with X86Simon Pilgrim1-82/+82
2023-12-05[AMDGPU] Presubmit test: max register pressure on defs. (#74424)Valery Pykhtin1-2/+113
2023-12-05[DebugInfo][RemoveDIs] Reverse order of DPValues from findDbgUsers (#74099)Jeremy Morse3-9/+72
2023-12-05[AArch64] Check X16&X17 in prologue if the fn has an SwiftAsyncContext. (#73945)Florian Hahn2-8/+478
2023-12-05[GitHub] Add greeting comment to opened PRs from new contributors (#72384)David Spickett1-0/+39
2023-12-05[DebugInfo][RemoveDIs] Avoid crash and output-difference in loop-rotate (#74093)Jeremy Morse2-18/+85
2023-12-05Revert "Reapply "ValueTracking: Identify implied fp classes by general fcmp (...Mikhail Goncharov4-500/+422
2023-12-05[AMDGPU] Add GFX12 encoding and aliases for existing SOP (SALU) instructions ...Jay Foad15-268/+25454
2023-12-05Fix parsing out-of-order ValueInfos (#73239)eleviant2-1/+26
2023-12-05[CaptureTracking] Treat vector GEPs as capturesNikita Popov2-3/+8
2023-12-05[GVN] Add test for capture via vector GEP (NFC)Nikita Popov1-0/+18
2023-12-05[SDAG] Count call argument attributes to reduce unnecessary extension (#73501)ZengZhijin2-2/+128
2023-12-05TargetInstrInfo, TargetSchedule: fix non-NFC parts of 9468de4 (#74338)Ramkumar Ramachandra3-3/+3
2023-12-04[RISCV] Use ABI align in varargs tests in push-pop-popret.ll. NFC (#74423)Craig Topper1-37/+13
2023-12-05[llvm][docs] Expand section on non-integral pointers (#73242)Danila Malyutin1-0/+6
2023-12-05[llvm][NFC] A start at cleaning up zero byte files that should have been remo...Brad Smith2-0/+0
2023-12-04[IR][TRE] Support associative intrinsics (#74226)Joshua Cao8-66/+321
2023-12-04[TRE] Add tests for intrinsic accumulatorsJoshua Cao1-0/+141
2023-12-05Revert "[lldb] A start at cleaning up zero byte files that should have been r...Brad Smith2-0/+0
2023-12-04[lldb] A start at cleaning up zero byte files that should have been removedBrad Smith2-0/+0
2023-12-04[X86] Remove x86-experimental-unordered-atomic-isel option and associated codePhilip Reames5-573/+207
2023-12-05LiveRangeEdit: Clear all dead flags when rematerializing (#73933)Matt Arsenault3-1/+245
2023-12-05AMDGPU: Return legal addressmode correctly for flat scratch (#71494)Ruiling, Song3-24/+28
2023-12-05AMDGPU: Pre-commit test to show diffRuiling Song1-0/+47
2023-12-04[ORC][MachO] Fix JITDylib header-addr tracking in MachOPlatform.Lang Hames2-26/+36
2023-12-04Update GitHub doc to mention that we accepts user branches for Stacked PRs (#...Mehdi Amini2-4/+10
2023-12-04Switch from the std::shared_mutex to an LLVM RWMutex (#74383)Kevin Frei1-4/+4
2023-12-05[llvm][IR] Add per-global code model attribute (#72077)hev13-2/+156
2023-12-05[BinaryFormat][LoongArch] Define psABI v2.20 relocs (#73345)Lu Weining3-10/+14
2023-12-05[CGP][AArch64] Rebase the common base offset for better ISelzhongyunde 004434077-65/+105
2023-12-05[AArch64] Precommit tests for PR71917zhongyunde 004434071-0/+87
2023-12-04[AIX] In assembly file, create a dummy text renamed to an empty string (#73052)stephenpeckham21-39/+68
2023-12-04[NFC][asan] Replace AsanInited/ENSURE_ASAN_INITED with TryAsanInitFromRtl (#7...Vitaly Buka4-40/+41
2023-12-04[RISCV] Remove SiFive7PipeV and replace it with SiFive7VCQ (#73969)Michael Maitland29-1869/+1879
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