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2024-04-04[clang][ubsan] Switch UBSAN optimization to `llvm.allow.{runtime,ubsan}.check...Vitaly Buka1-25/+90
2024-04-04[LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-foldi...Alexey Bataev15-1/+1631
2024-04-05[SPARC] Implement L and H inline asm argument modifiers (#87259)Koakuma2-0/+18
2024-04-04[UBSAN][HWASAN] Remove redundant flags (#87709)Vitaly Buka2-12/+6
2024-04-04[HWASAN][UBSAN] Don't use default `profile-summary-cutoff-hot` (#87691)Vitaly Buka2-2/+2
2024-04-04Revert "[ARM][Thumb2] Mark BTI-clearing instructions as scheduling region bou...Victor Campos1-166/+0
2024-04-04[NFC][UBSAN] Similar to #87687 for UBSANVitaly Buka1-64/+64
2024-04-04[NFC][HWASAN] Cleanup opt opt test (#87687)Vitaly Buka1-12/+12
2024-04-04[SLP]Fix PR87630: wrong result for externally used vector value.Alexey Bataev1-8/+4
2024-04-04[SLP]Add a test with the incorrect casting for external user, NFC.Alexey Bataev1-0/+64
2024-04-04[AArch64] Fix heuristics for folding "lsl" into load/store ops. (#86894)Eli Friedman10-131/+75
2024-04-04[CostModel][X86] Add costkinds test coverage for masked load/store/gather/sca...Simon Pilgrim5-16/+7255
2024-04-04[AArch64][PAC][MC][ELF] Support PAuth ABI compatibility tag (#85236)Daniil Kovalev2-0/+69
2024-04-04[ValueTracking] Add more conditions in to `isTruePredicate`Noah Goldstein2-28/+24
2024-04-04[ValueTracking] Add tests for deducing more conditions in `isTruePredicate`; NFCNoah Goldstein2-0/+466
2024-04-04[ValueTracking] Infer known bits fromfrom `(icmp eq (and/or x,y), C)`Noah Goldstein2-14/+10
2024-04-04[ValueTracking] Add tests for computing known bits from `(icmp eq (and/or x,y...Noah Goldstein1-5/+105
2024-04-04Revert "[GlobalISel] Fix the infinite loop issue in `commute_int_constant_to_...Gulfem Savrun Yeniceri1-28/+0
2024-04-04[llvm-objcopy] Add --compress-sectionsFangrui Song3-0/+195
2024-04-04[CostModel][X86] Update AVX1 sext v4i1 -> v4i64 cost based off worst case llv...Simon Pilgrim2-3/+3
2024-04-04[X86] Rename Zn3FPP# ports -> Zn3FP#. NFCSimon Pilgrim60-924/+924
2024-04-04[X86] Add or_is_add patterns for INC. (#87584)Craig Topper3-7/+10
2024-04-04[DAG] Preserve NUW when reassociating (#87621)Piotr Sobczak6-8289/+6071
2024-04-04[X86] evex-to-vex-compress.mir - update test checks missed in #87636Simon Pilgrim1-16/+16
2024-04-04[X86] Add missing immediate qualifier to the (V)ROUND instructions (#87636)Simon Pilgrim1-14/+14
2024-04-04[X86] Haswell/Broadwell - fix (V)ROUND*ri sched behaviours to use 2*Port1Simon Pilgrim4-44/+44
2024-04-04[SEH] Ignore EH pad check for internal intrinsics (#79694)Phoebe Wang1-0/+48
2024-04-04[ARM][Thumb2] Mark BTI-clearing instructions as scheduling region boundaries ...Victor Campos1-0/+166
2024-04-04[CostModel][X86] Update AVX1 sext v8i1 -> v8i32 cost based off worst case llv...Simon Pilgrim2-5/+5
2024-04-04[VPlan] Clean up dead recipes after UF & VF specific simplification.Florian Hahn1-4/+2
2024-04-04[RISCV] Add tests for vwsll for extends > .vf2. NFCLuke Lau1-0/+256
2024-04-04[VectorCombine][X86] foldShuffleOfCastops - fold shuffle(cast(x),cast(y)) -> ...Simon Pilgrim2-46/+39
2024-04-04[DAG] Remove extract_vector_elt(freeze(x)), idx -> freeze(extract_vector_elt(...Simon Pilgrim2-9/+15
2024-04-04[AMDGPU] Combine or remove redundant waitcnts at the end of each MBB (#87539)Jay Foad12-96/+58
2024-04-04[SPIR-V] Fix OpVariable instructions place in a function (#87554)Vyacheslav Levytskyy3-6/+94
2024-04-04[LVI] Handle range attributes (#86413)Andreas Jonson1-11/+75
2024-04-04[PAC][llvm-readobj][AArch64][ELF] Support `GNU_PROPERTY_AARCH64_FEATURE_PAUTH...Daniil Kovalev2-96/+204
2024-04-04[DAGCombiner][RISCV] Handle truncating splats in isNeutralConstant (#87338)Luke Lau3-119/+171
2024-04-04[RISCV] Add patterns for fixed vector vwsll (#87316)Luke Lau1-111/+72
2024-04-03[GlobalISel] Fix the infinite loop issue in `commute_int_constant_to_rhs`darkbuck1-0/+28
2024-04-04[RISCV][TTI] Scale the cost of intrinsic stepvector with LMUL (#87301)Shih-Po Hung1-89/+54
2024-04-03[RISCV][GISEL] Instruction selection for G_ZEXT, G_SEXT, and G_ANYEXT with sc...Michael Maitland3-0/+2702
2024-04-03[RISCV][GISEL] Regbankselect for G_ZEXT, G_SEXT, and G_ANYEXT with scalable v...Michael Maitland3-0/+2460
2024-04-03[RISCV][GISEL] Instruction selection for G_ICMPMichael Maitland1-0/+534
2024-04-03[RISCV][GISEL] Regbank select for scalable vector G_ICMPMichael Maitland1-0/+675
2024-04-03[RISCV][GISEL] Legalize G_ZEXT, G_SEXT, and G_ANYEXT, G_SPLAT_VECTOR, and G_I...Michael Maitland9-8/+7222
2024-04-03[VectorCombine][X86] shuffle-of-casts.ll - adjust zext nneg tests to improve ...Simon Pilgrim1-16/+16
2024-04-03[SLP]Improve minbitwidth analysis for operands of IToFP and ICmp instructions.Alexey Bataev2-6/+8
2024-04-03Revert "[SLP]Improve minbitwidth analysis for operands of IToFP and ICmp inst...Alexey Bataev2-8/+6
2024-04-03[SLP]Improve minbitwidth analysis for operands of IToFP and ICmp instructions.Alexey Bataev2-6/+8