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2024-02-21[TargetLowering] Correctly yield NaN from FP_TO_BF16David Majnemer6-962/+962
2024-02-21[TargetLowering] Actually add the adjustment to the significandDavid Majnemer1-28/+32
2024-02-21[ARM,MC] Support FDPIC relocationsFangrui Song3-0/+54
2024-02-21Correctly round FP -> BF16 when SDAG expands such nodes (#82399)David Majnemer10-4421/+16961
2024-02-21Revert "[Coro] [async] Disable inlining in async coroutine splitting (#80904)"Mogball7-228/+70
2024-02-22[RISCV] Add test case for miscompile in gather -> strided load combine. NFCLuke Lau1-0/+47
2024-02-21[CostModel][X86] Reduce the extra costs for ICMP complex predicates when an o...Simon Pilgrim2-907/+883
2024-02-21[SimplifyCFG] Add test coverage for #80122Simon Pilgrim1-0/+195
2024-02-21[CostModel][X86] Add test coverage for icmp vs zeroSimon Pilgrim1-0/+3057
2024-02-21[RISCV][TTI] Cost a subvector extract at a register boundary with exact vlen ...Philip Reames1-0/+229
2024-02-21[SystemZ] Use VT (not ArgVT) for SlotVT in LowerCall(). (#82475)Jonas Paulsson1-0/+18
2024-02-21[AArch64][SVE2] Enable dynamic shuffle for fixed length types. (#72490)Dinar Temirbulatov1-24/+383
2024-02-21[CostModel][X86] Fix expanded CTPOP i8 costsSimon Pilgrim2-2/+2
2024-02-21[CostModel][X86] Don't use undef for icmp cost testsSimon Pilgrim4-8120/+8120
2024-02-21[AArch64] Fix stack probing clobbering flags (#81879)Momchil Velikov1-0/+107
2024-02-21[X86] LowerCTPOP - add i3 and i4 LUT 'shift+mask' expansionsSimon Pilgrim1-37/+38
2024-02-21[X86] LowerCTPOP - "ctpop(i2 x) --> sub(x, (x >> 1))"Simon Pilgrim1-25/+19
2024-02-21[AArch64][GlobalISel] Refactor BITCAST Legalization (#80505)chuongg32-172/+239
2024-02-21[LoongArch] Assume no-op addrspacecasts by default (#82332)hev1-0/+47
2024-02-21[RISCV][ISel] Combine vector fadd/fsub/fmul with fp extend. (#81248)Chia4-25/+99
2024-02-21[SimplifyIndVar] LCSSA form is destroyed by simplifyLoopIVs, preserve it (#78...Vedant Paranjape1-0/+56
2024-02-21[InstCombine] Regenerate some fcmp tests to use the update_test_checks.py scriptSimon Pilgrim4-26/+65
2024-02-21[X86] Regenerate vector tests to add missing avx512 constant broadcast commentsSimon Pilgrim4-14/+14
2024-02-21[X86] Regenerate saddsat/ssubsat vector testsSimon Pilgrim2-2/+2
2024-02-21[AArch64] Fix syntax of gcsstr and gcssttr instructions (#82385)John Brawn2-12/+12
2024-02-21[GlobalISel] replace right identity X * -1.0 with fneg(x) (#80526)Nick Anderson3-152/+244
2024-02-21[AArch64][GlobalISel] Pre-Commit Tests for Refactor BITCASTTuan Chuong Goh1-9/+499
2024-02-21[LIR][SCEVExpander] Restore original flags when aborting transform (#82362)Nikita Popov1-3/+3
2024-02-21[RISCV][SDAG] Fold `select c, ~x, x` into `xor -c, x` (#82462)Yingwei Zheng1-0/+177
2024-02-21[InstCombine] Fold dependent IVs (#81151)Nikita Popov1-48/+32
2024-02-21[GlobalISel] Clamp out-of-range G_EXTRACT_VECTOR_ELT constant indices when co...Owen Anderson1-0/+38
2024-02-21Revert "Implement convergence control in MIR using SelectionDAG (#71785)"Sameer Sahasrabuddhe25-385/+118
2024-02-21[RISCV] Support llvm.readsteadycounter intrinsicWang Pengcheng1-0/+28
2024-02-21Implement convergence control in MIR using SelectionDAG (#71785)Sameer Sahasrabuddhe25-118/+385
2024-02-20[SPIR-V] Fix vloadn OpenCL builtin lowering (#81148)Michal Paszkowski3-95/+71
2024-02-20[GlobalISel] Make sure to check for load barriers when merging G_EXTRACT_VECT...Owen Anderson1-0/+46
2024-02-20[AMDGPU] Fix v_dot2_f16_f16/v_dot2_bf16_bf16 operands (#82423)Stanislav Mekhanoshin2-0/+24
2024-02-21Fix llvm-x86_64-debian-dylib buildbotTom Stellard2-4/+5
2024-02-20[llvm-jitlink] Use '@' rather than ':' for separator in -sectcreate.Lang Hames1-1/+1
2024-02-20[Hexagon] Update InstrInfo to include LD/ST offsets of vector instructions (#...Sumanth Gundapaneni1-0/+59
2024-02-20Reapply "[llvm] Fix assertion error where we didn't check fixed point… (#82...PiJoules1-0/+32
2024-02-20[LoopRotate][coroutines] Avoid hoisting addresses of thread-local variables o...Alan Zhao1-2/+3
2024-02-20[AMDGPU] Use autogenerated test checks for sdwa-preserve.mir test. NFC. (#82380)Valery Pykhtin1-31/+49
2024-02-21[WebAssembly] Add segment RETAIN flag to support private retained data (#81539)Yuta Saito2-14/+84
2024-02-20[ORC] Add SectCreateMaterializationUnit, llvm-jitlink -sectcreate option.Lang Hames2-0/+9
2024-02-20Revert "[AArch64] Restore Z-registers before P-registers (#79623)"Caroline Concatto11-167/+167
2024-02-20Revert "[AArch64] Remove unused ReverseCSRRestoreSeq option. (#82326)"Caroline Concatto1-0/+101
2024-02-20[MergeFunctions] Fix thunks for non-instruction debug info (#82080)Shoaib Meenai1-0/+54
2024-02-20[llvm-objcopy] Fix file offsets when PT_INTERP/PT_LOAD offsets are equal (#80...Fangrui Song1-0/+118
2024-02-20[X86] computeKnownBitsForTargetNode - add generic handling of PSHUFBSimon Pilgrim1-205/+178
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