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2024-04-03[AMDGPU] Add a missing COV6 case to getAMDHSACodeObjectVersion() (#87492)Emma Pilkington1-0/+7
2024-04-03[X86] Haswell/Broadwell/Skylake DPPS folded instructions use an extra port06 ...Simon Pilgrim8-38/+38
2024-04-02[dsymutil] Support generating dSYMs for firmware environments (#87432)Jonas Devlieghere3-0/+11
2024-04-03Revert "[PAC][llvm-readobj][AArch64][ELF] Support `GNU_PROPERTY_AARCH64_FEATU...Daniil Kovalev2-211/+96
2024-04-03[PAC][llvm-readobj][AArch64][ELF] Support `GNU_PROPERTY_AARCH64_FEATURE_PAUTH...Daniil Kovalev2-96/+211
2024-04-02[AArch64] Update Neoverse V2 FSQRT execution units in schedule model. (#86803)Rin Dobrescu1-7/+7
2024-04-01[llvm-objcopy,test] Prepend error: to some messagesFangrui Song2-4/+4
2024-04-01[InstrFDO][TypeProf] Implement binary instrumentation and profile read/write ...Mingming Liu2-0/+157
2024-03-30Reland "[PassManager] Support MachineFunctionProperties (#83668)" (#87141)paperchalice1-0/+12
2024-03-30Revert "Reland "[PassManager] Support MachineFunctionProperties (#83668)"" (#...paperchalice1-12/+0
2024-03-30Reland "[PassManager] Support MachineFunctionProperties (#83668)" (#87137)paperchalice1-0/+12
2024-03-30Revert "[PassManager] Support MachineFunctionProperties (#83668)" (#87136)paperchalice1-12/+0
2024-03-30[PassManager] Support MachineFunctionProperties (#83668)paperchalice1-0/+12
2024-03-28[DAGCombiner] Set disjoint flag in add->or and xor->or combines (#86925)Luke Lau1-3/+3
2024-03-27[llvm-dlltool][llvm-lib][COFF] Don't override NONAME exports with demangled A...Jacek Caban1-0/+93
2024-03-26[X86] ICX - vector XMM splat use Port 1 or 5 when boradcasting the shift amountSimon Pilgrim3-53/+53
2024-03-25[DirectX] disable experimental debuginfo iterators in debug-info test (#86538)Justin Bogner1-1/+1
2024-03-25[llvm-readobj,test] Test R_AARCH64_AUTH_{ABS64,RELATIVE} (#86511)Daniil Kovalev1-0/+4
2024-03-25[X86] HSW/BDW - vector splat shifts don't use Port5 when loading the shift am...Simon Pilgrim4-68/+68
2024-03-25[AArch64] Correct Neoverse V1 SVE 16-bit sdot/udot schedule pipelines. (#86142)David Green1-9/+9
2024-03-21[llvm-objcopy] Add --skip-symbol and --skip-symbols options (#80873)Ilia Kuklin1-0/+100
2024-03-21[llvm-lib] Use ARM64EC machine type for import libraries when -machine:arm64x...Jacek Caban1-3/+10
2024-03-20[llvm-ar][Object][COFF] Add support for EC symbols to llvm-ar. (#85230)Jacek Caban3-0/+130
2024-03-19[Hexagon] ELF attributes for Hexagon (#85359)quic-areg1-0/+4
2024-03-19[RemoveDIs][NFC] Rename DPValue -> DbgVariableRecord (#85216)Stephen Tozer1-1/+1
2024-03-19[dsymutil] Remove support for obfuscated bitcode (#85713)Jonas Devlieghere6-240/+0
2024-03-19Revert "[dsymutil] Remove support for obfuscated bitcode" (#85826)Andres Villegas6-0/+240
2024-03-19[llvm-readelf] Print a blank line for the first hex/string dumpFangrui Song7-9/+22
2024-03-19[dsymutil] Remove support for obfuscated bitcode (#85713)Jonas Devlieghere6-240/+0
2024-03-19[llvm-objdump][macho] Fix relative method list dumping for little endian host...alx321-1/+0
2024-03-18[NFC] Disable llvm-objdump test on AIXJake Egan1-0/+1
2024-03-18[CodeExtractor] Terminate callsite blocks to new `noreturn` functions with `u...Noah Goldstein8-16/+16
2024-03-18[ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM p...Alfie Richards1-1/+1
2024-03-18[llvm-debuginfo-analyzer][NFC] Rename LVElfReader.cpp[h] (#85530)Carlos Alberto Enciso2-2/+2
2024-03-16[llvm-objdump][macho] Add support for ObjC relative method lists (#85477)alx323-0/+86
2024-03-15Revert "[llvm-objdump][macho] Add support for ObjC relative method lists (#84...Kyungwoo Lee3-87/+0
2024-03-14[llvm-readobj,yaml2obj,test] Test SHT_HEX_ORDEREDFangrui Song1-0/+19
2024-03-15[llvm-profgen] Support COFF binary (#83972)Haohai Wen3-0/+92
2024-03-14[llvm-objdump][macho] Add support for ObjC relative method lists (#84250)alx323-0/+87
2024-03-14[RISCV] Model integer min max instructions from Zbb execute in late-B ALUMichael Maitland1-7/+7
2024-03-14[llvm-debuginfo-analyzer] Add support for WebAssembly binary format. (#82588)Carlos Alberto Enciso20-0/+2883
2024-03-13[llvm-ar] Be explicit about archive format in coff-symtab.test tests. (#85112)Jacek Caban1-1/+1
2024-03-13[RISCV] Add SMLoc to expanded vector pseudoinstructions in AsmParser. (#84875)Craig Topper1-5/+65
2024-03-13[llvm-objcopy] --[de]compress-debug-sections: don't compress SHF_ALLOC sectio...Fangrui Song4-0/+44
2024-03-13[llvm-ar] Use COFF archive format for COFF targets. (#82898)Jacek Caban2-0/+123
2024-03-12[Arm64EC] Copy import descriptors to the EC Map (#84834)Daniel Paoliello2-0/+18
2024-03-11[X86] (V)MPSADBW instructions can run on Port1 or Port5 for one uop stageSimon Pilgrim3-15/+15
2024-03-08[PGO] Add support for writing previous indexed format (#84505)Teresa Johnson1-0/+9
2024-03-08[X86] PBLENDW instructions can run on Port1 or Port5Simon Pilgrim3-15/+15
2024-03-08update_test_checks: keep meta variables stable by defaultNicolai Hähnle7-21/+41
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