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2024-04-03[AMDGPU][MC] Allow VOP3C dpp src1 to be imm or SGPR (#87418)Joe Nash11-25/+3216
2024-04-03[AMDGPU][MC] Enables sgpr or imm src1 for float VOP3 DPP, but excludi… (#87...Joe Nash15-10/+2022
2024-04-03[MIPS] Fix the opcode of max.fmt and mina.fmt (#85609)Cinhi Young6-24/+24
2024-04-02[WebAssembly] Allocate MCSymbolWasm data on MCContext (#85866)Tim Neumann1-0/+25
2024-03-29[X86][MC] Support enc/dec for IMULZU. (#86653)Freddy Ye3-0/+129
2024-03-28[MC][AArch64] Segregate constant pool caches by size. (#86832)Simon Tatham1-0/+25
2024-03-27Reland [AMDGPU] MCExpr-ify MC layer kernel descriptor (#86494)Janek van Oirschot9-0/+1429
2024-03-26[RISCV] Add register overlap checks to the assembler for some Zvk* instructio...Craig Topper5-0/+72
2024-03-26[RISCV] Check that the stack adjust immediate for cm.push/pop* has the correc...Craig Topper2-0/+24
2024-03-26[ARM][MC] Add GNU Alias for ldrexd, ldaexd, stlexd, and strexd instructions (...Alfie Richards3-1/+32
2024-03-22[MC][COFF][AArch64] Treat ARM64EC/X as ARM64 for relocations (#86019)Billy Laws1-3/+9
2024-03-21Revert "[AMDGPU] MCExpr-ify MC layer kernel descriptor" (#86151)Janek van Oirschot9-1429/+0
2024-03-21[DWARF5][COFF] Emit section-relative .debug_line_str relocations (#83773)timoh-ba1-0/+13
2024-03-21[AMDGPU][MC] Fix GFX12 check line typo and move testJoe Nash1-2/+7
2024-03-21[AMDGPU][MC][True16] Rename and combine VINTERP MC tests (#85949)Joe Nash5-780/+434
2024-03-21[AMDGPU] MCExpr-ify MC layer kernel descriptor (#80855)Janek van Oirschot9-0/+1429
2024-03-20[GOFF][z/OS] Change PrivateGlobalPrefix and PrivateLabelPrefix to be L# (#85730)Neumann Hon1-5/+5
2024-03-19[RISCV] Add the CSR names from Smrnmi. (#83370)Craig Topper1-0/+56
2024-03-19[Hexagon] ELF attributes for Hexagon (#85359)quic-areg3-0/+159
2024-03-19[ARM] FIX: Fix parsing `pkhtb` with a condition codeAlfie Richards1-0/+4
2024-03-19[LoongArch] Add diagnostics for PseudoLI_D instruction (#85742)wanglei1-0/+6
2024-03-19Fix macro expansion for AMDHSA_BITS_SET (#85661)Janek van Oirschot1-3/+3
2024-03-18[ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM p...Alfie Richards20-545/+602
2024-03-17[X86] Support APX CMOV/CFCMOV instructions (#82592)XinWang1010-0/+3595
2024-03-15[AMDGPU] Fix GFX11 sendmsg codes (#85299)Stanislav Mekhanoshin4-2/+14
2024-03-15[BPF] Add support for may_goto insn (#85358)yonghong-song1-0/+2
2024-03-14Reland [AMDGPU] Add AMDGPU specific variadic operation MCExprs (#84562)Janek van Oirschot2-0/+183
2024-03-13[RISCV] Add back SiFive's cdiscard.d.l1, cflush.d.l1, and cease instructions....Craig Topper2-0/+56
2024-03-13[AMDGPU] Test new GFX12 opcode name buffer_atomic_min_num_f32Jay Foad1-22/+22
2024-03-13[MIPS] Introduce NAL instruction support for Mipsr6 and prer6 (#84429)anbbna2-0/+35
2024-03-12[AMDGPU] Add missing GFX10 buffer format d16 hi instructions (#84809)Jay Foad2-0/+12
2024-03-12[X86][test] Add missing enc/dec tests for CTESTShengchen Kan3-0/+2569
2024-03-11[AMDGPU] Add missing tests for GFX10 (t)buffer format d16 instructions (#84789)Jay Foad4-0/+60
2024-03-11[llvm][arm] add T1 and T2 assembly options for vlldm and vlstmSivan Shani6-4/+121
2024-03-08[AMDGPU] Replace `isInlinableLiteral16` with specific version (#84402)Shilei Tian31-878/+870
2024-03-08[X86][MC] Support encoding/decoding for APX CCMP/CTEST (#83863)Shengchen Kan6-0/+4097
2024-03-06[MC] Move CompressDebugSections/RelaxELFRelocations from TargetOptions/MCAsmI...Fangrui Song3-4/+4
2024-03-06Revert "[AMDGPU] Add AMDGPU specific variadic operation MCExprs" (#84273)Florian Mayer2-183/+0
2024-03-06[AMDGPU] Make gfx11 vop2 disassembler tests use strict-whitespaceJoe Nash2-248/+248
2024-03-06[AMDGPU] Add AMDGPU specific variadic operation MCExprs (#82022)Janek van Oirschot2-0/+183
2024-03-06[AMDGPU] Make gfx11 vop1 disassembler tests use strict-whitespace (#84078)Joe Nash2-412/+414
2024-03-06[AMDGPU][NFC] Update tests to use -triple= instead of -arch=. (#84153)Ivan Kosarev135-238/+238
2024-03-05[RISCV] Add support of Sscofpmf (#83831)Wang Pengcheng1-0/+3
2024-03-04[X86][MC] Report error when the instruction length exceeds 15 bytes (#83708)Shengchen Kan1-0/+25
2024-02-29[AMDGPU] Add new aliases ds_subrev_rtn_u32/u64 for ds_rsub_rtn_u32/u64 (#83408)Jay Foad2-0/+18
2024-02-29Revert "[llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (#83116)"Tomas Matheson6-121/+4
2024-02-28[RISCV] Remove experimental from Zacas. (#83195)Craig Topper4-16/+16
2024-02-29[X86][MC] Teach disassembler to recognize apx instructions which ignores W bi...XinWang101-0/+118
2024-02-28Allow .alt_entry symbols to pass the .cfi nesting check (#82268)Jon Roelofs1-1/+5
2024-02-28[llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (#83116)SivanShani-Arm6-4/+121
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