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2024-02-23[AMDGPU] Fix encoding of VOP3P dpp on GFX11 and GFX12 (#82710)Stanislav Mekhanoshin9-22/+22
2024-02-21[ARM,MC] Support FDPIC relocationsFangrui Song1-0/+33
2024-02-21[AArch64] Fix syntax of gcsstr and gcssttr instructions (#82385)John Brawn2-12/+12
2024-02-20[AMDGPU] Fix v_dot2_f16_f16/v_dot2_bf16_bf16 operands (#82423)Stanislav Mekhanoshin2-0/+24
2024-02-21[WebAssembly] Add segment RETAIN flag to support private retained data (#81539)Yuta Saito1-14/+62
2024-02-20[AMDGPU] Fix operand types for `V_DOT2_F32_BF16` (#82044)Shilei Tian2-0/+126
2024-02-19[AMDGPU] Fix bf16 inv2pi inline constant hadling (#82283)Stanislav Mekhanoshin1-1/+8
2024-02-19[AMDGPU] Fix decoder for BF16 inline constants (#82276)Stanislav Mekhanoshin2-5/+56
2024-02-19[AMDGPU][MC][True16] Support V_RCP/SQRT/RSQ/LOG/EXP_F16. (#81131)Ivan Kosarev20-743/+2370
2024-02-19[AArch64AsmParser] Support (xxx), lsl 16 after #80571Fangrui Song1-0/+4
2024-02-17[RISCV] Recognize CSR name ssp for Zicfilp. (#81974)Yeting Kuo1-0/+14
2024-02-16[AMDGPU] Use `bf16` instead of `i16` for bfloat (#80908)Shilei Tian2-0/+30
2024-02-15[llvm] Support indirect symbol replacement with R_ARM_GOT_PREL (#81916)Shoaib Meenai1-0/+45
2024-02-14MipsAsmParser/O32: Don't add redundant $ to $-prefixed symbol in the la macro...YunQiang Su1-0/+22
2024-02-14[AMDGPU] Do not test both wave sizes for DSDIR disassembly (#81719)Jay Foad2-2/+0
2024-02-12BPF: Change callx insn encoding (#81546)yonghong-song1-0/+3
2024-02-12[AMDGPU][MC] Fix printing vcc(_lo) twice for VOPC DPP instrucitons (#81158)Mirko Brkušanin1-78/+78
2024-02-12AMDGPU: Don't allow s_barrier on gfx12 (#81317)Konstantin Zhuravlyov3-6/+3
2024-02-11[AArch64AsmParser] Allow branch target symbol to have a shift/extend modifier...Fangrui Song3-0/+28
2024-02-09[AArch64] Add the Ampere1B core (#81297)Philipp Tomsich2-0/+4
2024-02-09[llvm-nm][WebAssembly] Print function symbol sizes (#81315)Derek Schuff2-7/+7
2024-02-08[AMDGPU][True16] Support VOP3 source DPP operands. (#80892)Ivan Kosarev6-76/+284
2024-02-06[RISCV] Set the RVC bit in the ELF EFlags for C or Zca. (#80913)Craig Topper1-0/+2
2024-02-06[RISCV] Add Ssqosid support to -march. (#80747)Craig Topper1-0/+3
2024-02-06[XCOFF] Add compiler version to an auxiliary symbol table entry (#80162)stephenpeckham1-8/+8
2024-02-06[AArch64] Set predicates for FP/SIMD InstAliases (#79033)ostannard1-0/+170
2024-02-05[RISCV] Update llvm/test/MC/RISCV/attribute-arch.s for RISC-V Pointer Masking...Michael Maitland1-0/+30
2024-02-05[AMDGPU] Introduce Code Object V6 (#76954)Pierre van Houtryve1-0/+5
2024-02-04[WebAssembly] fix `table.grow` type checker (#80572)Congcong Cai2-11/+28
2024-02-03[WebAssembly] validate `table.grow` correctly (#80437)Congcong Cai2-11/+24
2024-02-01[RISCV] Add -march support for many of the S extensions mentioned in the prof...Craig Topper1-0/+51
2024-02-01[RISCV] Add srmcfg CSR from Ssqosid extension. (#79914)Craig Topper1-0/+18
2024-02-01[RISCV][MC] MC layer support for the experimental zalasr extension (#79911)Brendan Sweeney5-0/+180
2024-01-31[X86][MC] Support encoding/decoding for APX variant LZCNT/TZCNT/POPCNT instru...XinWang109-0/+378
2024-01-31[RISCV][MC] Add MC layer support for the experimental zabha extension (#80005)Yingwei Zheng3-0/+315
2024-01-30[AMDGPU][AsmParser] Allow `v_writelane_b32` to use SGPR and M0 as source oper...Shilei Tian1-0/+18
2024-01-30[RISCV] Minor cleanup to rori MC layer testing. NFCCraig Topper4-11/+11
2024-01-30[X86][MC] Support encoding optimization & assembler relaxation about immedia...XinWang1015-0/+843
2024-01-29[RISCV] Graduate Zicond to non-experimental (#79811)Alex Bradbury2-8/+8
2024-01-27Fix unsigned typos (#76670)Rageking83-3/+3
2024-01-26[X86][test] Add MRM7r/MRM7m entries in evex format enc/dec testsShengchen Kan3-3/+30
2024-01-26[X86] Support APX promoted RAO-INT and MOVBE instructions (#77431)XinWang107-0/+461
2024-01-26[X86] Support promoted ENQCMD, KEYLOCKER and USERMSR (#77293)XinWang109-0/+540
2024-01-25[RISCV][MC] Add experimental support of Zaamo and ZalrscWang Pengcheng9-1/+44
2024-01-25[X86][MC] Support Enc/Dec for NF BMI instructions (#76709)XinWang1018-6/+586
2024-01-24[AArch64] FP/SIMD is not mandatory for v8-R (#79004)ostannard6-6/+9
2024-01-24[AMDGPU] Add GFX12 WMMA and SWMMAC instructions (#77795)Mirko Brkušanin4-0/+6314
2024-01-24[AMDGPU][GFX12] VOP encoding and codegen - add support for v_cvt fp8/… (#78...Mariusz Sikora18-0/+735
2024-01-24[RISCV][MC] Split tests for A into Zaamo and Zalrsc partsWang Pengcheng8-71/+92
2024-01-24[LoongArch] Insert nops and emit align reloc when handle alignment directive ...Jinyang He3-2/+119
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