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2024-04-05[SPARC] Implement L and H inline asm argument modifiers (#87259)Koakuma2-0/+18
2024-04-04Revert "[ARM][Thumb2] Mark BTI-clearing instructions as scheduling region bou...Victor Campos1-166/+0
2024-04-04[AArch64] Fix heuristics for folding "lsl" into load/store ops. (#86894)Eli Friedman10-131/+75
2024-04-04[AArch64][PAC][MC][ELF] Support PAuth ABI compatibility tag (#85236)Daniil Kovalev1-0/+50
2024-04-04Revert "[GlobalISel] Fix the infinite loop issue in `commute_int_constant_to_...Gulfem Savrun Yeniceri1-28/+0
2024-04-04[X86] Add or_is_add patterns for INC. (#87584)Craig Topper3-7/+10
2024-04-04[DAG] Preserve NUW when reassociating (#87621)Piotr Sobczak6-8289/+6071
2024-04-04[X86] evex-to-vex-compress.mir - update test checks missed in #87636Simon Pilgrim1-16/+16
2024-04-04[ARM][Thumb2] Mark BTI-clearing instructions as scheduling region boundaries ...Victor Campos1-0/+166
2024-04-04[RISCV] Add tests for vwsll for extends > .vf2. NFCLuke Lau1-0/+256
2024-04-04[DAG] Remove extract_vector_elt(freeze(x)), idx -> freeze(extract_vector_elt(...Simon Pilgrim2-9/+15
2024-04-04[AMDGPU] Combine or remove redundant waitcnts at the end of each MBB (#87539)Jay Foad12-96/+58
2024-04-04[SPIR-V] Fix OpVariable instructions place in a function (#87554)Vyacheslav Levytskyy3-6/+94
2024-04-04[DAGCombiner][RISCV] Handle truncating splats in isNeutralConstant (#87338)Luke Lau3-119/+171
2024-04-04[RISCV] Add patterns for fixed vector vwsll (#87316)Luke Lau1-111/+72
2024-04-03[GlobalISel] Fix the infinite loop issue in `commute_int_constant_to_rhs`darkbuck1-0/+28
2024-04-03[RISCV][GISEL] Instruction selection for G_ZEXT, G_SEXT, and G_ANYEXT with sc...Michael Maitland3-0/+2702
2024-04-03[RISCV][GISEL] Regbankselect for G_ZEXT, G_SEXT, and G_ANYEXT with scalable v...Michael Maitland3-0/+2460
2024-04-03[RISCV][GISEL] Instruction selection for G_ICMPMichael Maitland1-0/+534
2024-04-03[RISCV][GISEL] Regbank select for scalable vector G_ICMPMichael Maitland1-0/+675
2024-04-03[RISCV][GISEL] Legalize G_ZEXT, G_SEXT, and G_ANYEXT, G_SPLAT_VECTOR, and G_I...Michael Maitland7-0/+7204
2024-04-03[AArch64] Add a test for non-temporal masked loads / stores. NFCDavid Green1-0/+75
2024-04-03[RISCV][GISEL] Run update_mir_test_checks on llvm/test/CodeGen/RISCV/GlobalIS...Michael Maitland1-44/+44
2024-04-03[NFC] Automatically generate indirect-branch-tracking-eh2.llAmaury Séchet1-48/+172
2024-04-03[CodeGen] Fix test after #86049Weining Lu1-0/+1
2024-04-03[DAG] SimplifyDemandedVectorElts - add ISD::AVGCEILS/AVGCEILU/AVGFLOORS/AVGFL...aniplcc2-7/+56
2024-04-03[X86] Add vector truncation tests for nsw/nuw flagsSimon Pilgrim1-0/+2213
2024-04-03[VP][DAGCombine] Use `simplifySelect` when combining vp.select. (#87342)AinsleySnow1-0/+53
2024-04-03Print more descriptive error message when trying to link a global with append...Gleb Popov1-1/+1
2024-04-03[PPC] [NFC] add testcase for more store forwardingChen Zheng1-0/+17
2024-04-03[AArch64][GlobalISel] Basic add_sat and sub_sat vector handling. (#80650)David Green7-422/+767
2024-04-03Reapply "[CodeGen] Fix register pressure computation in MachinePipeli… (#87...Ryotaro KASUGA2-165/+181
2024-04-02[RISCV] Lower (vector_interleave X, undef) to (vzext_vl X). (#87283)Craig Topper1-13/+6
2024-04-02[RISCV] Add test for miscompile of vector.interleave when odd vector is liter...Craig Topper1-0/+25
2024-04-02[X86] canonicalizeShuffleWithOp - don't fold VPERMI(BINOP(X,Y)) -> BINOP(VPER...Simon Pilgrim3-4855/+4464
2024-04-02[RISCV][GISEL] Legalize G_BITCAST for scalable vectors (#85970)Michael Maitland1-0/+356
2024-04-02[ExpandLargeDivRem] Scalarize vector types. (#86959)Bevin Hansson1-5/+3228
2024-04-02[SPIRV][HLSL] Add HLSL intrinsic tests (#86844)Farzon Lotfi22-2/+487
2024-04-02[FPEnv][AArch64] Correct strictfp test.Kevin P. Neal2-11/+11
2024-04-02[SelectionDAG][Statepoint] Fix truncation of `gc.statepoint` ID argument (#85...Il-Capitano1-4/+28
2024-04-02[SPIR-V] Fix validity of atomic instructions (#87051)Vyacheslav Levytskyy6-27/+124
2024-04-02[GlobalIsel] Combine G_EXTRACT_VECTOR_ELT (#85321)Thorsten Schütt3-23/+301
2024-04-02[RISCV] Add tests for fixed vector vwsll. NFCLuke Lau1-0/+920
2024-04-01Revert "[CodeGen] Fix register pressure computation in MachinePipeliner (#870...Gulfem Savrun Yeniceri2-179/+165
2024-04-01[CodeGen] Fix register pressure computation in MachinePipeliner (#87030)Ryotaro KASUGA2-165/+179
2024-04-01[CodeGen] Fix test after #86049Vitaly Buka1-0/+1
2024-03-31[CodeGen] Fix test after #86049Vitaly Buka1-2/+3
2024-03-31[CodeGen] Fix test after #86049Vitaly Buka1-0/+3
2024-03-31[CodeGen] Fix test after #86049Vitaly Buka1-0/+3
2024-04-01[AMDGPU] Use glue for convergence tokens at call-like operations (#86766)Sameer Sahasrabuddhe12-113/+64