| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2024-04-03 | [GlobalISel] Fix the infinite loop issue in `commute_int_constant_to_rhs` | darkbuck | 1 | -0/+28 |
| 2024-04-03 | [RISCV][GISEL] Instruction selection for G_ZEXT, G_SEXT, and G_ANYEXT with sc... | Michael Maitland | 3 | -0/+2702 |
| 2024-04-03 | [RISCV][GISEL] Regbankselect for G_ZEXT, G_SEXT, and G_ANYEXT with scalable v... | Michael Maitland | 3 | -0/+2460 |
| 2024-04-03 | [RISCV][GISEL] Instruction selection for G_ICMP | Michael Maitland | 1 | -0/+534 |
| 2024-04-03 | [RISCV][GISEL] Regbank select for scalable vector G_ICMP | Michael Maitland | 1 | -0/+675 |
| 2024-04-03 | [RISCV][GISEL] Legalize G_ZEXT, G_SEXT, and G_ANYEXT, G_SPLAT_VECTOR, and G_I... | Michael Maitland | 7 | -0/+7204 |
| 2024-04-03 | [AArch64] Add a test for non-temporal masked loads / stores. NFC | David Green | 1 | -0/+75 |
| 2024-04-03 | [RISCV][GISEL] Run update_mir_test_checks on llvm/test/CodeGen/RISCV/GlobalIS... | Michael Maitland | 1 | -44/+44 |
| 2024-04-03 | [NFC] Automatically generate indirect-branch-tracking-eh2.ll | Amaury Séchet | 1 | -48/+172 |
| 2024-04-03 | [CodeGen] Fix test after #86049 | Weining Lu | 1 | -0/+1 |
| 2024-04-03 | [DAG] SimplifyDemandedVectorElts - add ISD::AVGCEILS/AVGCEILU/AVGFLOORS/AVGFL... | aniplcc | 2 | -7/+56 |
| 2024-04-03 | [X86] Add vector truncation tests for nsw/nuw flags | Simon Pilgrim | 1 | -0/+2213 |
| 2024-04-03 | [VP][DAGCombine] Use `simplifySelect` when combining vp.select. (#87342) | AinsleySnow | 1 | -0/+53 |
| 2024-04-03 | Print more descriptive error message when trying to link a global with append... | Gleb Popov | 1 | -1/+1 |
| 2024-04-03 | [PPC] [NFC] add testcase for more store forwarding | Chen Zheng | 1 | -0/+17 |
| 2024-04-03 | [AArch64][GlobalISel] Basic add_sat and sub_sat vector handling. (#80650) | David Green | 7 | -422/+767 |
| 2024-04-03 | Reapply "[CodeGen] Fix register pressure computation in MachinePipeli… (#87... | Ryotaro KASUGA | 2 | -165/+181 |
| 2024-04-02 | [RISCV] Lower (vector_interleave X, undef) to (vzext_vl X). (#87283) | Craig Topper | 1 | -13/+6 |
| 2024-04-02 | [RISCV] Add test for miscompile of vector.interleave when odd vector is liter... | Craig Topper | 1 | -0/+25 |
| 2024-04-02 | [X86] canonicalizeShuffleWithOp - don't fold VPERMI(BINOP(X,Y)) -> BINOP(VPER... | Simon Pilgrim | 3 | -4855/+4464 |
| 2024-04-02 | [RISCV][GISEL] Legalize G_BITCAST for scalable vectors (#85970) | Michael Maitland | 1 | -0/+356 |
| 2024-04-02 | [ExpandLargeDivRem] Scalarize vector types. (#86959) | Bevin Hansson | 1 | -5/+3228 |
| 2024-04-02 | [SPIRV][HLSL] Add HLSL intrinsic tests (#86844) | Farzon Lotfi | 22 | -2/+487 |
| 2024-04-02 | [FPEnv][AArch64] Correct strictfp test. | Kevin P. Neal | 2 | -11/+11 |
| 2024-04-02 | [SelectionDAG][Statepoint] Fix truncation of `gc.statepoint` ID argument (#85... | Il-Capitano | 1 | -4/+28 |
| 2024-04-02 | [SPIR-V] Fix validity of atomic instructions (#87051) | Vyacheslav Levytskyy | 6 | -27/+124 |
| 2024-04-02 | [GlobalIsel] Combine G_EXTRACT_VECTOR_ELT (#85321) | Thorsten Schütt | 3 | -23/+301 |
| 2024-04-02 | [RISCV] Add tests for fixed vector vwsll. NFC | Luke Lau | 1 | -0/+920 |
| 2024-04-01 | Revert "[CodeGen] Fix register pressure computation in MachinePipeliner (#870... | Gulfem Savrun Yeniceri | 2 | -179/+165 |
| 2024-04-01 | [CodeGen] Fix register pressure computation in MachinePipeliner (#87030) | Ryotaro KASUGA | 2 | -165/+179 |
| 2024-04-01 | [CodeGen] Fix test after #86049 | Vitaly Buka | 1 | -0/+1 |
| 2024-03-31 | [CodeGen] Fix test after #86049 | Vitaly Buka | 1 | -2/+3 |
| 2024-03-31 | [CodeGen] Fix test after #86049 | Vitaly Buka | 1 | -0/+3 |
| 2024-03-31 | [CodeGen] Fix test after #86049 | Vitaly Buka | 1 | -0/+3 |
| 2024-04-01 | [AMDGPU] Use glue for convergence tokens at call-like operations (#86766) | Sameer Sahasrabuddhe | 12 | -113/+64 |
| 2024-03-31 | [CodeGen] Add default lowering for llvm.allow.{runtime,ubsan}.check() (#86049) | Vitaly Buka | 5 | -0/+143 |
| 2024-04-01 | [BPF] expand cttz, ctlz for i32, i64 (#73668) | Yingchi Long | 1 | -0/+304 |
| 2024-04-01 | [AMDGPU] Expose RTZ version of f16 interpolation for gfx11+ (#86614) | Ruiling, Song | 2 | -0/+60 |
| 2024-03-31 | [AMDGPU] Use directive for kernarg preload header padding (#86004) | Austin Kerbow | 2 | -8708/+279 |
| 2024-03-31 | [AMDGPU] Extend MFMA padding option to gfx90a+ (#86768) | Austin Kerbow | 1 | -0/+504 |
| 2024-03-30 | [IR] Use EXPORTAS for ARM64EC mangled symbols with dllexport attribute. (#81940) | Jacek Caban | 1 | -0/+39 |
| 2024-03-30 | [RISCV] RISCV vector calling convention (2/2) (#79096) | Brandon Wu | 3 | -12/+100 |
| 2024-03-30 | [AMDGPU] Use AMDGPU::isIntrinsicAlwaysUniform in isSDNodeAlwaysUniform (#87085) | Jay Foad | 1 | -22/+12 |
| 2024-03-29 | [GlobalISel] Fold G_ICMP if possible (#86357) | Shilei Tian | 19 | -384/+413 |
| 2024-03-29 | [DXIL] Add lowering for `ceil` (#87043) | Helena Kotas | 2 | -0/+30 |
| 2024-03-29 | Reland "[NVPTX] Use .common linkage for common globals" (#86824) | Alex MacLean | 2 | -3/+35 |
| 2024-03-29 | [HLSL][DXIL] HLSL's `round` should follow `roundeven` behavior (#87078) | Farzon Lotfi | 2 | -24/+15 |
| 2024-03-29 | [GlobalISel] Handle div-by-pow2 (#83155) | Shilei Tian | 4 | -729/+2379 |
| 2024-03-29 | [AArch64][GISEL] Regenerate select tests with inline register classes (#87013) | Marc Auberer | 1 | -190/+143 |
| 2024-03-29 | [RISCV] Add missing RISCVMaskedPseudo for TIED pseudos (#86787) | Luke Lau | 1 | -10/+4 |
