| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2024-04-04 | [RISCV] Add tests for vwsll for extends > .vf2. NFC | Luke Lau | 1 | -0/+256 |
| 2024-04-04 | [DAGCombiner][RISCV] Handle truncating splats in isNeutralConstant (#87338) | Luke Lau | 3 | -119/+171 |
| 2024-04-04 | [RISCV] Add patterns for fixed vector vwsll (#87316) | Luke Lau | 1 | -111/+72 |
| 2024-04-03 | [RISCV][GISEL] Instruction selection for G_ZEXT, G_SEXT, and G_ANYEXT with sc... | Michael Maitland | 3 | -0/+2702 |
| 2024-04-03 | [RISCV][GISEL] Regbankselect for G_ZEXT, G_SEXT, and G_ANYEXT with scalable v... | Michael Maitland | 3 | -0/+2460 |
| 2024-04-03 | [RISCV][GISEL] Instruction selection for G_ICMP | Michael Maitland | 1 | -0/+534 |
| 2024-04-03 | [RISCV][GISEL] Regbank select for scalable vector G_ICMP | Michael Maitland | 1 | -0/+675 |
| 2024-04-03 | [RISCV][GISEL] Legalize G_ZEXT, G_SEXT, and G_ANYEXT, G_SPLAT_VECTOR, and G_I... | Michael Maitland | 7 | -0/+7204 |
| 2024-04-03 | [RISCV][GISEL] Run update_mir_test_checks on llvm/test/CodeGen/RISCV/GlobalIS... | Michael Maitland | 1 | -44/+44 |
| 2024-04-03 | [VP][DAGCombine] Use `simplifySelect` when combining vp.select. (#87342) | AinsleySnow | 1 | -0/+53 |
| 2024-04-02 | [RISCV] Lower (vector_interleave X, undef) to (vzext_vl X). (#87283) | Craig Topper | 1 | -13/+6 |
| 2024-04-02 | [RISCV] Add test for miscompile of vector.interleave when odd vector is liter... | Craig Topper | 1 | -0/+25 |
| 2024-04-02 | [RISCV][GISEL] Legalize G_BITCAST for scalable vectors (#85970) | Michael Maitland | 1 | -0/+356 |
| 2024-04-02 | [RISCV] Add tests for fixed vector vwsll. NFC | Luke Lau | 1 | -0/+920 |
| 2024-03-31 | [CodeGen] Add default lowering for llvm.allow.{runtime,ubsan}.check() (#86049) | Vitaly Buka | 1 | -0/+32 |
| 2024-03-30 | [RISCV] RISCV vector calling convention (2/2) (#79096) | Brandon Wu | 3 | -12/+100 |
| 2024-03-29 | [GlobalISel] Fold G_ICMP if possible (#86357) | Shilei Tian | 6 | -45/+84 |
| 2024-03-29 | [RISCV] Add missing RISCVMaskedPseudo for TIED pseudos (#86787) | Luke Lau | 1 | -10/+4 |
| 2024-03-29 | [RISCV] Add test case for vmerge fold for tied pseudos with rounding mode. NFC | Luke Lau | 1 | -0/+17 |
| 2024-03-29 | [RISCV] Combine (or disjoint ext, ext) -> vwadd (#86929) | Luke Lau | 1 | -11/+7 |
| 2024-03-29 | [RISCV] Add more disjoint or tests for vwadd[u].{w,v}v. NFC | Luke Lau | 1 | -2/+58 |
| 2024-03-29 | [SDAG] Use shifts if ISD::MUL is illegal when lowering ISD::CTPOP (#86505) | Wang Pengcheng | 14 | -1106/+787 |
| 2024-03-28 | [RISCV][TypePromotion] Dont generate truncs if PromotedType is greater than S... | Sudharsan Veeravalli | 1 | -0/+27 |
| 2024-03-28 | [RISCV] Extend pattern matches involving shNadd to support disjoint or (#87001) | Philip Reames | 1 | -0/+89 |
| 2024-03-29 | [RISCV] Combine ({s,u}{div,rem} (zext, zext)) -> (zext ({s,u}{div,rem} (zext,... | Luke Lau | 1 | -16/+24 |
| 2024-03-28 | [RISCV][GlobalISel] Fix legalizing ‘llvm.va_copy’ intrinsic (#86863) | bvlgah | 2 | -6/+932 |
| 2024-03-28 | [RISCV] Add test case for missed vwaddu.vv due to add->or combine. NFC | Luke Lau | 1 | -0/+22 |
| 2024-03-27 | [RISCV] Add test coverage for (add (shl Z, c1), Y, (shl Z, c2)) variants | Philip Reames | 1 | -0/+90 |
| 2024-03-27 | [RISCV] RISCV vector calling convention (1/2) (#77560) | Brandon Wu | 1 | -0/+95 |
| 2024-03-27 | [RISCV] Add test case to show missing vmerge fold on tied pseudos. NFC | Luke Lau | 1 | -0/+16 |
| 2024-03-27 | [RISCV] Add tests for combineBinOpOfZExts. NFC (#86689) | Luke Lau | 1 | -0/+146 |
| 2024-03-27 | [RISCV] Teach RISCVMakeCompressible handle byte/half load/store for Zcb. (#83... | Yeting Kuo | 1 | -0/+585 |
| 2024-03-26 | [RISCV] Align stack size down to a multiple of 16 before using cm.push/pop. (... | Craig Topper | 1 | -2/+4 |
| 2024-03-26 | [RISCV] Preserve MMO when expanding PseudoRV32ZdinxSD/PseudoRV32ZdinxLD. (#85... | Craig Topper | 1 | -16/+16 |
| 2024-03-26 | [RISCV][GISEL] Legalize, regbankselect, and instruction-select G_VSCALE (#85967) | Michael Maitland | 6 | -0/+850 |
| 2024-03-26 | [RISCV] Combine (mul (zext, zext)) -> (zext (mul (zext, zext))) (#86465) | Luke Lau | 2 | -76/+60 |
| 2024-03-26 | [DAG] Fold insert_subvector(N0, extract_subvector(N0, N2), N2) --> N0 (#86487) | Simon Pilgrim | 1 | -17/+13 |
| 2024-03-25 | [RISCV] Enable sub(max, min) lowering for ABDS and ABDU (#86592) | Philip Reames | 3 | -474/+237 |
| 2024-03-25 | [RISCV] Add fixed vector coverage for sum-absolute-difference (sad) pattern | Philip Reames | 1 | -0/+191 |
| 2024-03-25 | [RISCV] Add coverage for abdu and abds (absolute difference) | Philip Reames | 2 | -0/+1305 |
| 2024-03-25 | Revert "[RISCV][GISEL] Add instruction select tests for G_VSCALE" | Michael Maitland | 2 | -552/+0 |
| 2024-03-25 | Revert "[RISCV][GISEL] Add regbankselect tests for G_VSCALE" | Michael Maitland | 2 | -567/+0 |
| 2024-03-25 | Revert "[RISCV][GISEL] Legalize G_VSCALE" | Michael Maitland | 2 | -403/+0 |
| 2024-03-25 | [RISCV] Add integer RISCVISD::SELECT_CC to canCreateUndefOrPoison and isGuara... | Craig Topper | 6 | -756/+679 |
| 2024-03-25 | [RISCV][GISEL] Add instruction select tests for G_VSCALE | Michael Maitland | 2 | -0/+552 |
| 2024-03-25 | [RISCV][GISEL] Add regbankselect tests for G_VSCALE | Michael Maitland | 2 | -0/+567 |
| 2024-03-25 | [RISCV][GISEL] Legalize G_VSCALE | Michael Maitland | 2 | -0/+403 |
| 2024-03-25 | [RISCV][GISEL] Instruction select for scalable G_SELECT | Michael Maitland | 1 | -0/+345 |
| 2024-03-25 | [RISCV][GISEL] Regbank select for scalable G_SELECT | Michael Maitland | 1 | -0/+558 |
| 2024-03-25 | [RISCV][GISEL] Legalize G_SELECT for scalable vectors | Michael Maitland | 1 | -0/+400 |
