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path: root/llvm/test/CodeGen/AMDGPU/ds_read2.ll
AgeCommit message (Expand)AuthorFilesLines
2024-03-06[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)Emma Pilkington1-1/+1
2023-12-12[AMDGPU][NFC] Test autogenerated llc tests for COV5 (#74339)Saiyedul Islam1-25/+24
2023-10-10[AMDGPU] Use absolute relocations when compiling for AMDPAL and Mesa3D (#67791)Thomas Symalla1-16/+10
2023-09-12Revert "[AMDGPU] Make default AMDHSA Code Object Version to be 5 (#65410)" (#...Saiyedul Islam1-28/+32
2023-09-12[AMDGPU] Make default AMDHSA Code Object Version to be 5 (#65410)Saiyedul Islam1-32/+28
2023-04-10[AMDGPU] Introduce SIInstrWorklist to process instructions in moveToVALUskc71-1/+1
2022-12-19[AMDGPU] Convert some tests to opaque pointers (NFC)Nikita Popov1-228/+225
2022-11-29Revert "enable code-object-version=5"Ron Lieberman1-28/+32
2022-11-29enable code-object-version=5Ron Lieberman1-32/+28
2022-08-02[AMDGPU] avoid blind converting to VALU REG_SEQUENCE and PHIsAlexander Timofeev1-1/+1
2022-07-30[AMDGPU] Extend SILoadStoreOptimizer to s_load instructionsCarl Ritson1-8/+4
2022-07-29Revert "[AMDGPU] avoid blind converting to VALU REG_SEQUENCE and PHIs"Alexander Timofeev1-1/+1
2022-07-28[AMDGPU] avoid blind converting to VALU REG_SEQUENCE and PHIsAlexander Timofeev1-1/+1
2022-04-21[AMDGPU] Refine 64 bit misaligned LDS ops selectionStanislav Mekhanoshin1-5/+4
2022-02-21[AMDGPU] SILoadStoreOptimizer: avoid unbounded register pressure increasesJay Foad1-7/+7
2022-01-20AMDGPU: Stop reserving 36-bytes before kernel arguments for amdpalMatt Arsenault1-85/+85
2021-12-04AMDGPU: Enable fixed function ABI by defaultMatt Arsenault1-26/+50
2021-12-01[AMDGPU] Set most sched model resource's BufferSize to oneAustin Kerbow1-195/+193
2021-09-14[AMDGPU] Switch PostRA sched to MachineSchedJoe Nash1-5/+5
2021-09-09AMDGPU: Invert ABI attribute handlingMatt Arsenault1-7/+7
2021-06-23[AMDGPU] Propagate LDS align into to instructionsStanislav Mekhanoshin1-22/+11
2021-06-07[AMDGPU] Handle constant LDS uses from different kernelsStanislav Mekhanoshin1-2/+2
2021-06-07[AMDGPU] Increase alignment of LDS globals if necessary before LDS lowering.hsmahesha1-15/+10
2021-06-04Revert "[AMDGPU] Increase alignment of LDS globals if necessary before LDS lo...hsmahesha1-10/+15
2021-06-04[AMDGPU] Increase alignment of LDS globals if necessary before LDS lowering.hsmahesha1-15/+10
2021-05-26[AMDGPU] Fix kernel LDS lowering for constantsStanislav Mekhanoshin1-40/+31
2021-05-25[AMDGPU] Lower kernel LDS into a sorted structureStanislav Mekhanoshin1-43/+55
2021-04-08[AMDGPU] Only use ds_read/write_b128 for alignment >= 16hsmahesha1-1/+1
2021-01-26[AMDGPU] Update subtarget features for new target ID supportAustin Kerbow1-31/+32
2021-01-05[NFC] Removed unused prefixes in test/CodeGen/AMDGPUMircea Trofin1-3/+3
2020-11-16AMDGPU: Select global saddr mode from SGPR pointerMatt Arsenault1-72/+55
2020-11-03[AMDGPU] Fix ds_read2/write2 with unaligned offsetsJay Foad1-2/+2
2020-11-03[AMDGPU] Specify a triple to avoid codegen changes depending on host OSJay Foad1-110/+76
2020-11-02Revert "Fix ds_read2/write2 unaligned offsets"Jay Foad1-2/+2
2020-11-02Fix ds_read2/write2 unaligned offsetsJay Foad1-2/+2
2020-11-02[AMDGPU] Precommit ds_read2/write2 with unaligned offset tests. NFC.Jay Foad1-0/+97
2020-11-02[AMDGPU] Generate test checks. NFC.Jay Foad1-214/+1023
2020-11-02[AMDGPU] Remove a comment. NFC.Jay Foad1-2/+0
2020-09-18[AMDGPU] Set DS alignment requirements to be more strictMirko Brkusanin1-1/+5
2020-08-26AMDGPU: Don't assert on misaligned DS read2/write2 offsetsMatt Arsenault1-3/+24
2020-08-21[AMDGPU] Use ds_read/write_b96/b128 when possible for SDagMirko Brkusanin1-2/+3
2020-08-21[AMDGPU] Fix alignment requirements for 96bit and 128bit local loads and storesMirko Brkusanin1-2/+2
2020-08-17AMDGPU: Match global saddr addressing modeMatt Arsenault1-3/+3
2020-04-13[llvm] Fix yet more missing FileCheck colonsJon Roelofs1-2/+2
2020-04-06[llvm] Fix missing FileCheck directive colonsJonathan Roelofs1-2/+2
2020-01-14[MachineScheduler] Reduce reordering due to mem op clusteringJay Foad1-1/+1
2019-06-25AMDGPU: Write LDS objects out as global symbols in code generationNicolai Haehnle1-12/+16
2018-02-23AMDGPU: Track physreg uses in SILoadStoreOptimizerNicolai Haehnle1-0/+23
2018-02-21AMDGPU: Do not combine loads/store across physreg defsNicolai Haehnle1-0/+19
2017-11-30AMDGPU: Use gfx9 carry-less add/sub instructionsMatt Arsenault1-3/+4
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