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2024-04-04[CostModel][X86] Add costkinds test coverage for masked load/store/gather/sca...Simon Pilgrim5-16/+7255
2024-04-04[CostModel][X86] Update AVX1 sext v4i1 -> v4i64 cost based off worst case llv...Simon Pilgrim2-3/+3
2024-04-04[CostModel][X86] Update AVX1 sext v8i1 -> v8i32 cost based off worst case llv...Simon Pilgrim2-5/+5
2024-04-04[RISCV][TTI] Scale the cost of intrinsic stepvector with LMUL (#87301)Shih-Po Hung1-89/+54
2024-04-02[FPEnv][CostModel] Correct strictfp test.Kevin P. Neal2-2/+2
2024-04-02[RISCV][TTI] Scale the cost of trunc/fptrunc/fpext with LMUL (#87101)Shih-Po Hung4-276/+276
2024-04-02[RISCV][TTI] Scale the cost of intrinsic umin/umax/smin/smax with LMUL (#87245)Shih-Po Hung1-60/+60
2024-04-01Recommit "[RISCV] Refine cost on Min/Max reduction (#79402)" (#86480)Shih-Po Hung4-230/+230
2024-03-31[CostModel] No cost for llvm.allow.{runtime,ubsan}.check() (#86064)Vitaly Buka2-0/+12
2024-03-26Recommit "[RISCV][TTI] Scale the cost of the sext/zext with LMUL (#86617)"ShihPo Hung5-551/+551
2024-03-26Revert "[RISCV][TTI] Scale the cost of the sext/zext with LMUL (#86617)"ShihPo Hung5-551/+551
2024-03-27[RISCV][TTI] Scale the cost of the sext/zext with LMUL (#86617)Shih-Po Hung5-551/+551
2024-03-25[RISCV][CostModel] Estimate cost of llvm.vector.reduce.fmaximum/fminimum (#80...Shih-Po Hung2-52/+91
2024-03-13[RISCV] Add cost model coverage for fixed vector insert with known VLENPhilip Reames1-0/+66
2024-03-11[SystemZ] Provide improved cost estimates (#83873)Dominik Steenken1-0/+128
2024-03-07[CostModel] getInstructionCost - improve estimation of costs for length chang...Simon Pilgrim11-506/+726
2024-03-05[CostModel][X86] Add test coverage for 'concat subvector' style shufflesSimon Pilgrim4-0/+764
2024-03-04[AArch64] Improve cost model for legal subvec insert/extract (#81135)Graham Hunter1-4/+32
2024-03-04[PowerPC] adjust cost for extract i64 from vector on P9 and above (#82963)Chen Zheng2-4/+4
2024-03-03[AArch64] Add more complete support for BF16David Majnemer1-4/+4
2024-03-02[RISCV] Fix crash when unrolling loop containing vector instructions (#83384)Shih-Po Hung1-0/+53
2024-02-29[RISCV][CostModel] Updates reduction and shuffle cost (#77342)Shih-Po Hung3-26/+26
2024-02-27[LLVM][test] Convert remaining instances of ConstantExpr based splats to use ...Paul Walker1-14/+14
2024-02-23[AArch64][CostModel] Improve scalar frem cost (#80423)Paschalis Mpeis2-45/+45
2024-02-21[CostModel][X86] Reduce the extra costs for ICMP complex predicates when an o...Simon Pilgrim1-834/+834
2024-02-21[CostModel][X86] Add test coverage for icmp vs zeroSimon Pilgrim1-0/+3057
2024-02-21[RISCV][TTI] Cost a subvector extract at a register boundary with exact vlen ...Philip Reames1-0/+229
2024-02-21[CostModel][X86] Fix expanded CTPOP i8 costsSimon Pilgrim2-2/+2
2024-02-21[CostModel][X86] Don't use undef for icmp cost testsSimon Pilgrim4-8120/+8120
2024-02-19[NFC][AArch64] Tests for guarding unrolling with scalable vec ins/ext (#81132)Graham Hunter1-0/+57
2024-02-19[PowerPC] adjust cost for vector insert/extract with non const index (#79092)Chen Zheng1-18/+18
2024-02-15Reapply "[RISCV][TTI] Extract subvector at index zero is free (#81751)"Philip Reames3-66/+66
2024-02-15Revert "[RISCV][TTI] Extract subvector at index zero is free (#81751)"Craig Topper2-38/+38
2024-02-15[RISCV][TTI] Extract subvector at index zero is free (#81751)Philip Reames2-38/+38
2024-02-15[RISCV] Add cost model tests for llvm.vector.{insert,extract}. NFCLuke Lau2-0/+504
2024-02-12[test] Replace aarch64-*-{eabi,gnueabi}{,hf} with aarch64Fangrui Song2-7/+7
2024-02-12[TTI]Fallback to SingleSrcPermute shuffle kind, if no direct estimation forAlexey Bataev6-1636/+3772
2024-02-07[DebugInfo][RemoveDIs] Final final test-maintenence patch (#80988)Jeremy Morse3-6/+15
2024-02-05[RISCV] Add tests for reduce.fmaximum/fminimum. NFC (#80553)Shih-Po Hung2-0/+154
2024-02-05[Analysis] Convert tests to opaque pointers (NFC)Nikita Popov42-42/+42
2024-02-02[TTI] Add costing for vp.strided.load and vp.strided.store (#80360)Philip Reames2-36/+36
2024-02-01[RISCV] Add aligned/unaligned tests for vp.strided.load and vp.strided.storePhilip Reames1-0/+16
2024-02-01[RISCV] Add cost model coverage for vp.strided.load and vp.strided.storePhilip Reames1-0/+114
2024-02-01Revert "[RISCV] Refine cost on Min/Max reduction" (#80340)Philip Reames4-230/+230
2024-02-01[NFC] Reorder test lines in arith-fp-frem.ll (#79991)Paschalis Mpeis1-48/+48
2024-01-30[RISCV] Refine cost on Min/Max reduction (#79402)Shih-Po Hung4-230/+230
2024-01-26[RISCV] Refine cost on Min/Max reduction with i1 type (#79401)Shih-Po Hung2-32/+32
2024-01-25[RISCV][CostModel] Refine Arithmetic reduction costs (#79103)Shih-Po Hung8-295/+295
2024-01-24[RISCV] Add tests for reverse shuffles of i1 vectors. NFCLuke Lau1-0/+12
2024-01-23[PowerPC] lower partial vector store cost (#78358)RolandF771-0/+19
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