Age | Commit message (Expand) | Author | Files | Lines |
2024-03-25 | [MC] Make `MCParsedAsmOperand::getReg()` return `MCRegister` (#86444) | Sergei Barannikov | 1 | -1/+1 |
2024-03-02 | [Sparc] Use generated MatchRegisterName (NFCI) (#82165) | Sergei Barannikov | 2 | -328/+115 |
2024-02-25 | [CodeGen] Port AtomicExpand to new Pass Manager (#71220) | Rishabh Bali | 1 | -1/+1 |
2024-02-13 | [Sparc] limit MaxAtomicSizeInBitsSupported to 32 for 32-bit Sparc. (#81655) | James Y Knight | 1 | -3/+8 |
2024-02-11 | [SPARC] Support reserving arbitrary general purpose registers (#74927) | Koakuma | 7 | -2/+85 |
2024-02-01 | [TTI] Use Register in isLoadFromStackSlot and isStoreToStackSlot [nfc] (#80339) | Philip Reames | 2 | -4/+4 |
2024-01-20 | [Sparc] Use StringRef::starts_with_insensitive (NFC) | Kazu Hirata | 1 | -10/+10 |
2024-01-16 | [SPARC] Prefer RDPC over CALL to implement GETPCX for 64-bit target | Koakuma | 2 | -7/+36 |
2024-01-12 | [SPARC] Consume `tune-cpu` directive in the backend (#77195) | Koakuma | 3 | -12/+22 |
2024-01-02 | [llvm][NFC] Use SDValue::getConstantOperandVal(i) where possible (#76708) | Alex Bradbury | 1 | -2/+2 |
2023-12-07 | [RISCV][MC] Pass MCSubtargetInfo down to shouldForceRelocation and evaluateTa... | Craig Topper | 1 | -1/+2 |
2023-10-14 | [Sparc] Use isNullConstant (NFC) | Kazu Hirata | 1 | -3/+2 |
2023-10-12 | Use llvm::endianness::{big,little,native} (NFC) | Kazu Hirata | 2 | -6/+9 |
2023-10-10 | [Sparc] Remove duplicate ALU and SETHI instructions (NFCI) (#66851) | Sergei Barannikov | 3 | -47/+29 |
2023-10-09 | [Sparc] Replace CMP instructions with InstAlias (NFCI) (#66859) | Sergei Barannikov | 5 | -17/+24 |
2023-09-25 | [TargetLowering] Deduplicate choosing InlineAsm constraint between ISels (#67... | Nick Desaulniers | 2 | -8/+5 |
2023-09-25 | [Sparc] Remove Subtarget member of SparcTargetMachine (#66876) | Sergei Barannikov | 3 | -18/+13 |
2023-09-20 | [Sparc] Remove LEA instructions (NFCI) (#65850) | Sergei Barannikov | 6 | -46/+31 |
2023-09-15 | [Sparc] Don't emit __multi3 on 32-bit SPARC (#66362) | Rainer Orth | 1 | -0/+1 |
2023-09-14 | [NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#6... | Arthur Eubanks | 2 | -8/+8 |
2023-09-13 | reland [InlineAsm] wrap ConstraintCode in enum class NFC (#66264) | Nick Desaulniers | 1 | -10/+9 |
2023-09-11 | [InlineAsm] refactor InlineAsm class NFC (#65649) | Nick Desaulniers | 1 | -17/+13 |
2023-09-09 | [Sparc] Replace some CAS instructions with InstAlias (#65588) | Sergei Barannikov | 3 | -49/+30 |
2023-09-07 | [Sparc] Change register spelling to lowercase (NFC) (#65464) | Sergei Barannikov | 4 | -274/+248 |
2023-09-06 | [MC] Change tryParseRegister to return ParseStatus (NFC) | Sergei Barannikov | 1 | -14/+12 |
2023-09-06 | [Sparc] Replace OperandMatchResultTy with ParseStatus (NFC) | Sergei Barannikov | 1 | -126/+95 |
2023-09-05 | [SPARC][IAS] Add more instruction aliases | Koakuma | 2 | -0/+57 |
2023-09-05 | [SPARC][IAS] Add named V9 ASI tag constants for memory instructions | Koakuma | 7 | -13/+109 |
2023-09-05 | [SPARC][IAS] Add support for the full set of CAS instructions | Koakuma | 4 | -13/+64 |
2023-09-05 | [SPARC][IAS] Add complete set of v9 ASI load, store & swap forms | Koakuma | 6 | -41/+178 |
2023-09-05 | [SPARC][IAS] Add v9 encoding of %fq | Koakuma | 1 | -0/+9 |
2023-09-01 | [SPARC][IAS] Add definitions for v9 State Registers | Koakuma | 7 | -55/+86 |
2023-08-31 | SelectionDAG: Swap operands of atomic_store | Matt Arsenault | 2 | -8/+8 |
2023-08-31 | [InlineAsm] wrap Kind in enum class NFC | Nick Desaulniers | 1 | -11/+11 |
2023-08-29 | [MC,AArch64] Suppress local symbol to STT_SECTION conversion for GOT relocations | Fangrui Song | 1 | -4/+4 |
2023-08-22 | [SPARC][IAS] Add SETX pseudoinstruction | Koakuma | 2 | -0/+88 |
2023-08-12 | [SPARC][IAS] Add support for v9 DONE, RETRY, SAVED, & RESTORED | Koakuma | 1 | -0/+16 |
2023-07-01 | [MC] Add three-state parseDirective as a replacement for ParseDirective | Sergei Barannikov | 1 | -7/+5 |
2023-06-26 | Move SubtargetFeature.h from MC to TargetParser | Job Noorman | 1 | -1/+1 |
2023-06-06 | [Hexagon,Lanai,LoongArch,Sparc] Migrate to new encodeInstruction that uses Sm... | Fangrui Song | 1 | -3/+4 |
2023-05-17 | [CodeGen] Support allocating of arguments by decreasing offsets | Sergei Barannikov | 1 | -1/+1 |
2023-05-17 | [CodeGen] Replace CCState's getNextStackOffset with getStackSize (NFC) | Sergei Barannikov | 1 | -6/+6 |
2023-05-17 | [Sparc] Make use of GET_SUBTARGETINFO_MACRO (NFC) | Sergei Barannikov | 4 | -64/+10 |
2023-05-16 | [KnownBits] Define and use intersectWith and unionWith | Jay Foad | 1 | -1/+1 |
2023-05-14 | [MC] Remove redundant classof definitions for MCTargetDesc's derived classes | Fangrui Song | 1 | -2/+0 |
2023-05-04 | [SPARC][MC] Fix encoding of backwards BPr branches | Brad Smith | 4 | -15/+15 |
2023-05-03 | Split out `CodeGenTypes` from `CodeGen` for LLT/MVT | NAKAMURA Takumi | 1 | -0/+1 |
2023-04-26 | Revert "[SPARC][MC] Fix encoding of backwards BPr branches" | Vitaly Buka | 4 | -22/+15 |
2023-04-26 | [SPARC][MC] Fix encoding of backwards BPr branches | Brad Smith | 4 | -15/+22 |
2023-04-26 | [SPARC] Lower BR_CC to BPr on 64-bit target whenever possible | Brad Smith | 8 | -31/+101 |