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path: root/llvm/lib/Target/RISCV/RISCVFeatures.td
AgeCommit message (Expand)AuthorFilesLines
2024-04-19[RISCV] Rename FeatureRVE to FeatureStdExtE. NFC (#89174)Craig Topper1-4/+4
2024-04-18[RISCV] Remove unused HasStdExtZama16b Predicate. NFCCraig Topper1-3/+0
2024-04-17[RISCV] Remove unused Predicates for I and E extensions. NFCCraig Topper1-5/+1
2024-04-17[RISCV] Support Zama16b1p0 (#88474)Jesse Huang1-0/+7
2024-04-16[RISCV] Re-separate unaligned scalar and vector memory features in the backen...Craig Topper1-4/+9
2024-04-16[RISCV] Generate more W instructonsPengcheng Wang1-3/+3
2024-04-08[RISCV] Zimop/Zcmop are ratifiedPengcheng Wang1-2/+2
2024-03-25[RISCV] Add a tune feature to disable stripping W suffix (#86255)Wang Pengcheng1-0/+4
2024-03-13[RISCV] Add back SiFive's cdiscard.d.l1, cflush.d.l1, and cease instructions....Craig Topper1-0/+24
2024-03-05[RISCV] Remove note of Sscofpmf and add a newline after FeatureStdExtSscofpmf...Wang Pengcheng1-0/+1
2024-03-05[RISCV] Add support of Sscofpmf (#83831)Wang Pengcheng1-0/+3
2024-02-28[RISCV] Remove experimental from Zacas. (#83195)Craig Topper1-1/+1
2024-02-15[RISCV] Use RISCVSubtarget::hasStdExtCOrZcd() in HasStdExtCOrZcd tablgen Pred...Craig Topper1-1/+1
2024-02-10[RISCV] Add Zicfiss support to the shadow call stack implementation. (#68075)Yeting Kuo1-0/+5
2024-02-06[RISCV] Add Ssqosid support to -march. (#80747)Craig Topper1-0/+4
2024-02-05[RISCV] Fix description of Ssstrict to have a closing parenthesis.Craig Topper1-1/+1
2024-02-05[RISCV] Add support for RISC-V Pointer Masking (#79929)Michael Maitland1-0/+34
2024-02-02[RISCV] Rename some SubtargetFeature names to remove an extra 's'. NFCCraig Topper1-3/+3
2024-02-01[RISCV] Add -march support for many of the S extensions mentioned in the prof...Craig Topper1-0/+65
2024-02-01[RISCV][MC] MC layer support for the experimental zalasr extension (#79911)Brendan Sweeney1-0/+7
2024-01-31[RISCV][MC] Add MC layer support for the experimental zabha extension (#80005)Yingwei Zheng1-0/+7
2024-01-29[RISCV] Graduate Zicond to non-experimental (#79811)Alex Bradbury1-1/+1
2024-01-25[RISCV] Add Tune to DontSinkSplatOperands (#79199)Michael Maitland1-0/+7
2024-01-25[RISCV] Use TableGen-based macro fusion (#72224)Wang Pengcheng1-24/+0
2024-01-25[RISCV][MC] Add experimental support of Zaamo and ZalrscWang Pengcheng1-0/+18
2024-01-23[RISCV] Move FeatureStdExtH in RISCVFeatures.td. NFCCraig Topper1-8/+10
2024-01-23[RISCV] Re-format RISCVFeatures.td so it doesn't look like AssemblerPredicate...Craig Topper1-208/+215
2024-01-22[RISCV] Combine HasStdExtZfhOrZfhmin and HasStdExtZfhmin. NFC (#78826)Craig Topper1-13/+2
2024-01-22[RISCV] Arrange RISCVFeatures.td into sections of related extensions. NFC (#7...Craig Topper1-274/+304
2024-01-19[RISCV] Add support for Smepmp 1.0 (#78489)Min-Yih Hsu1-0/+4
2024-01-19[RISCV] Add support for new unprivileged extensions defined in profiles spec ...Luke Lau1-0/+26
2024-01-16[RISCV] CodeGen of RVE and ilp32e/lp64e ABIs (#76777)Wang Pengcheng1-0/+7
2024-01-12[RISCV] Update descriptions for Zvk* shorthands. (#77961)Craig Topper1-12/+8
2024-01-11[RISCV] Simplify the description for ssaia and smaia. (#77870)Craig Topper1-7/+4
2024-01-11[RISCV] Remove period from Zvbb extension description.Craig Topper1-2/+2
2024-01-10[RISCV] Support isel for Zacas for XLen and i32. (#77666)Craig Topper1-0/+1
2024-01-08[RISCV] Add branch+c.mv macrofusion for sifive-p450. (#76169)Craig Topper1-0/+6
2023-12-30[RISCV] Add MC layer support for Zicfiss. (#66043)Yeting Kuo1-0/+9
2023-12-28[RISCV] Remove XSfcie extension.Craig Topper1-7/+0
2023-12-28[RISCV][MC] Add support for experimental Zcmop extension (#76395)Wang Pengcheng1-0/+7
2023-12-26[RISCV][MC] Add support for experimental Zimop extension (#75182)Jivan Hakobyan1-0/+6
2023-12-22[RISCV] Split TuneShiftedZExtFusion (#76032)Wang Pengcheng1-3/+13
2023-12-22[RISCV] Rename TuneVeyronFusions to TuneVentanaVeyronwangpc1-6/+2
2023-12-19[RISCV] Remove Zfbfmin dependency from Zvfbfmin. (#75851)Craig Topper1-2/+2
2023-12-18[RISCV] Remove experimental from Vector Crypto extensions (#74213)Eric Biggers1-16/+20
2023-12-19[RISCV] Update implies for subtarget feature. (#75824)Yeting Kuo1-11/+11
2023-12-11[RISCV] Macro-fusion support for veyron-v1 CPU. (#70012)Mikhail Gudim1-3/+16
2023-12-01[RISCV] Collapse fast unaligned access into a single feature [nfc-ish] (#73971)Philip Reames1-9/+4
2023-11-16[RISCV] Simplify assembler error information for RVV instructions (#72469)Jianjian Guan1-4/+4
2023-11-16[RISCV][MC] MC layer support for xcvmem and xcvelw extensionsLiaoChunyu1-0/+15
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