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path: root/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
AgeCommit message (Expand)AuthorFilesLines
2023-10-12[PowerPC][Atomics] Simplify atomicrmw i128 patterns. NFC. (#68779)Kai Luo1-43/+16
2023-08-31SelectionDAG: Swap operands of atomic_storeMatt Arsenault1-2/+2
2023-08-30[PowerPC] Support initial-exec TLS relocation on AIXQiu Chaofan1-2/+2
2023-06-27[PowerPC][TLS] Add additional TLS X-Form loads/store instructionsAmy Kwan1-0/+42
2023-06-19[AIX][TLS] Generate 64-bit local-exec access code sequenceAmy Kwan1-0/+11
2023-04-02[Targets] Rename Flag->Glue. NFCCraig Topper1-1/+1
2023-02-24[PowerPC] Add Binary Coded Decimal Assist InstructionsStefan Pintilie1-1/+10
2023-02-02[PowerPC] Switch to by-name matching for instructions (part 2 of 2).James Y Knight1-32/+32
2023-02-02[PowerPC] Switch to by-name matching for instructions (part 1 of 2).James Y Knight1-555/+555
2022-10-03[PowerPC] Fix a number of inefficiencies and issues with atomic code genNemanja Ivanovic1-0/+2
2022-09-26[PowerPC] XCOFF exception section support on the direct assembler pathPaul Scoropan1-3/+0
2022-08-30[PowerPC] CTRLoop pseudo instructions should not be duplicatedTing Wang1-2/+4
2022-08-19[PowerPC] Fix bugs in sign-/zero-extension eliminationStefan Pintilie1-32/+46
2022-08-08[PowerPC] mapping hardward loop intrinsics to powerpc pseudoChen Zheng1-7/+3
2022-06-20[PowerPC] add a new pass to expand ctr loop pseudosChen Zheng1-0/+8
2022-04-18[PowerPC] Mark side effects of Power9 darn instructionQiu Chaofan1-2/+5
2022-02-14[PowerPC] Remove the LDMX instruction.Stefan Pintilie1-4/+0
2022-01-05[PowerPC] Add support for ROP protection for 32 bit.Stefan Pintilie1-12/+13
2021-12-01[PowerPC][AIX] Add toc-data support for 64-bit AIX small code model.Yousuf Ali1-0/+12
2021-11-11[PowerPC] PPC backend optimization to lower int_ppc_tdw/int_ppc_tw intrinsics...Victor Huang1-2/+0
2021-11-10[PowerPC] Respect rounding mode in the back endNemanja Ivanovic1-0/+63
2021-09-29[PowerPC] The builtins load8r and store8r are Power 7 plus.Stefan Pintilie1-0/+6
2021-09-21[PowerPC] NFC: Remove unused tblgen template argsCullen Rhodes1-3/+3
2021-09-01[PowerPC] Implement quadword atomic load/storeKai Luo1-0/+29
2021-08-30[PowerPC] Set branch/call instructions as no hasSideEffectsQiu Chaofan1-4/+6
2021-08-12[PowerPC] Implement XL compatibility builtin __addexLei Huang1-0/+7
2021-07-20[PowerPC] Implemented mtmsr, mfspr, mtspr BuiltinsAlbion Fung1-0/+4
2021-07-20[PowerPC] Add PowerPC cmpb builtin and emit target indepedent code for XL com...Victor Huang1-0/+3
2021-07-15[PowerPC] Add PowerPC population count, reversed load and store related built...Victor Huang1-0/+4
2021-07-15[PowerPC] Fix popcntb XL Compat Builtin for 32bitQuinn Pham1-3/+4
2021-07-15[PowerPC] Generate inlined quadword lock free atomic operations via AtomicExpandKai Luo1-0/+82
2021-07-13[PowerPC] Add PowerPC compare and multiply related builtins and instrinsics f...Victor Huang1-0/+20
2021-07-13[PowerPC] Fix L[D|W]ARX ImplementationAlbion Fung1-2/+0
2021-07-12[PowerPC] Implement trap and conversion builtins for XL compatibilityAlbion Fung1-0/+6
2021-07-05[PowerPC] Implament Load and Reserve and Store Conditional BuiltinsAlbion Fung1-0/+5
2021-06-15[PowerPC] Export 16 byte load-store instructionsKai Luo1-1/+45
2021-05-12[PowerPC] Fix definitions of CMPRB8, CMPEQB, CMPRB, SETB in PPCInstr64Bit.td ...Victor Huang1-4/+2
2021-05-04[PowerPC][NFC] Update atomic patterns to use the refactored load/store implem...Amy Kwan1-16/+16
2021-04-30[PowerPC] Add new infrastructure to select load/store instructions, update P8...Amy Kwan1-51/+42
2021-04-15[PowerPC] Add ROP Protection Instructions for PowerPCStefan Pintilie1-0/+23
2021-04-09Revert "[PowerPC] Add ROP Protection Instructions for PowerPC"Mitch Phillips1-23/+0
2021-04-09[PowerPC] Add ROP Protection Instructions for PowerPCStefan Pintilie1-0/+23
2021-03-08[AIX][TLS] Generate 64-bit general-dynamic access code sequenceLei Huang1-0/+23
2021-03-05[PowerPC] Update Copy/Paste encodings according to ISA3.1Jinsong Ji1-2/+8
2021-03-04[PowerPC] Disable more extended mne on AIXJinsong Ji1-3/+5
2021-01-14[PowerPC] Only use some extend mne if assembler is modern enoughJinsong Ji1-2/+5
2020-12-18[PowerPC] Select the D-Form load if we know its offset meets the requirementQingShan Zhang1-7/+7
2020-12-08[PowerPC] Implement intrinsic for DARN instructionQiu Chaofan1-0/+5
2020-12-08[PowerPC] Correct the bit-width definition for some imm operand in td.Esme-Yi1-1/+1
2020-12-04[llvm-exegesis][PowerPC] Add more register classesJinsong Ji1-0/+3
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