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path: root/llvm/lib/Target/PowerPC/PPC.td
AgeCommit message (Expand)AuthorFilesLines
2023-09-07[AIX][TLS] Add target attribute for -maix-small-local-exec-tls option.Amy Kwan1-0/+11
2023-02-02[PowerPC] Switch to by-name matching for instructions (part 2 of 2).James Y Knight1-6/+0
2022-12-15[PowerPC] Simplify PPCSubtargetKai Nacke1-3/+11
2022-11-10[PowerPC] add a new subtarget feature fastMFLRChen Zheng1-1/+4
2022-09-24[TableGen] Add useDeprecatedPositionallyEncodedOperands option.James Y Knight1-0/+1
2022-05-26[PowerPC][Future] Add an ISA Future to go with mcpu=future.Stefan Pintilie1-1/+5
2022-05-10[PowerPC] Fix PPCISD::STBRX selection issue on A2Ting Wang1-1/+2
2022-05-02[PowerPC] Enable CR bits support for Power8 and above.Amy Kwan1-1/+2
2021-12-06[PowerPC] Implement general back2back fusionQiu Chaofan1-0/+4
2021-11-23[PowerPC] Implement more fusion types for Power10Qiu Chaofan1-1/+17
2021-11-08[PowerPC] Implement basic macro fusion in Power10Qiu Chaofan1-1/+20
2021-10-18[PowerPC] Implement scheduling model for Power10Qiu Chaofan1-2/+1
2021-09-29[PowerPC] The builtins load8r and store8r are Power 7 plus.Stefan Pintilie1-1/+5
2021-07-20[PowerPC] Store, load, move from and to registers related builtinsAlbion Fung1-1/+2
2021-07-15[PowerPC] Generate inlined quadword lock free atomic operations via AtomicExpandKai Luo1-0/+4
2021-07-13[PowerPC][NFC] Power ISA features for SemacheckingVictor Huang1-1/+5
2021-07-13Revert "[PowerPC][NFC] Power ISA features for Semachecking"Victor Huang1-5/+1
2021-07-13[PowerPC][NFC] Power ISA features for SemacheckingVictor Huang1-1/+5
2021-03-24[PowerPC] Add mprivileged optionStefan Pintilie1-0/+4
2021-03-24[PowerPC] Change option to mrop-protectStefan Pintilie1-5/+4
2021-02-18[PowerPC] Add option for ROP ProtectionStefan Pintilie1-1/+5
2021-01-14[PowerPC] Only use some extend mne if assembler is modern enoughJinsong Ji1-0/+4
2021-01-12[PowerPC][NFCI] PassSubtarget to ASMWriterJinsong Ji1-0/+8
2021-01-12[PowerPC] Add support for embedded devices with EFPU2Nemanja Ivanovic1-0/+3
2020-10-23[PowerPC] Fix the Predicates for enabling pcrelative-memops and PLXVP/PSTXVP ...Victor Huang1-1/+1
2020-09-13Reland "[PowerPC] Implement instruction clustering for stores"Qiu Chaofan1-3/+8
2020-09-12[Power10] Enable the heuristic for Power10 and switch the sched modelQingShan Zhang1-4/+4
2020-09-10[PPC][GlobalISel] Add initial GlobalIsel infrastructureKit Barton1-0/+1
2020-09-08Revert "[PowerPC] Implement instruction clustering for stores"Qiu Chaofan1-8/+3
2020-09-08[PowerPC] Implement instruction clustering for storesQiu Chaofan1-3/+8
2020-08-24[PowerPC] Add clang options to control MMA supportBaptiste Saleil1-1/+6
2020-07-29[PowerPC] Add options to control paired vector memops supportBaptiste Saleil1-1/+5
2020-07-28Re-land "[PowerPC] Remove QPX/A2Q BGQ/BGP CNK support"Jinsong Ji1-13/+1
2020-07-27Revert "[PowerPC] Remove QPX/A2Q BGQ/BGP CNK support"Jinsong Ji1-1/+13
2020-07-27[PowerPC] Remove QPX/A2Q BGQ/BGP CNK supportJinsong Ji1-13/+1
2020-07-01[PowerPC][NFC] Update doc for FeatureISA3_1/FeatureISA3_0 definitionsLei Huang1-2/+2
2020-06-29[PowerPC] Fix FeatureISA3_1 def in PPC.td to imply FeatureISA3_0.Lei Huang1-1/+2
2020-06-16[PowerPC] Add -m[no-]power10-vector clang and llvm optionAhsan Saghir1-1/+5
2020-05-27[PowerPC] Add support for -mcpu=pwr10 in both clang and llvmLei Huang1-5/+22
2020-05-27Revert "[PowerPC] Add support for -mcpu=pwr10 in both clang and llvm"Lei Huang1-22/+5
2020-05-26[PowerPC] Add support for -mcpu=pwr10 in both clang and llvmLei Huang1-5/+22
2020-05-11[PowerPC] Use PredictableSelectIsExpensive to enable select to branch in CGPKang Zhang1-12/+26
2020-04-23[llvm] NFC: Fix trivial typo in rst and td filesKazuaki Ishizaki1-1/+1
2020-03-23[PowerPC]: e500 target can't use lwsync, use msync insteadJustin Hibbits1-1/+1
2020-03-12[PowerPC] Add the MacroFusion support for Power8QingShan Zhang1-1/+12
2020-01-28[PowerPC][Future] Add pld and pstd to future CPUVictor Huang1-1/+6
2020-01-24[PowerPC][Future] Add prefixed instruction paddi to future CPUVictor Huang1-1/+6
2020-01-14[PowerPC] Fix powerpcspe subtarget enablement in llvm backendJustin Hibbits1-1/+1
2019-12-28[PowerPC] Change default for unaligned FP access for older subtargetsNemanja Ivanovic1-1/+5
2019-12-03[NFC][PowerPC] Add the inheritable and additional features to make the proces...QingShan Zhang1-39/+81
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