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2024-04-19AMDGPU: Refactor unsafe atomicrmw remark emission (#89379)Matt Arsenault1-15/+18
2024-04-19[AMDGPU] Allow any linkage for dynlds (#84742)Pierre van Houtryve1-7/+3
2024-04-18[AMDGPU][MC] Separate VOPC MnemonicAlias from Instruction (#89105)Joe Nash1-105/+117
2024-04-18 [AMDGPU] Add disassembler diagnostics for invalid kernel descriptors (#87400)Emma Pilkington2-101/+172
2024-04-18[AMDGPU] Support wide register or subregister access when emitting s_singleus...Scott Egerton1-6/+19
2024-04-18[AMDGPU] Fix end() iterator dereference in SILowerSGPRSpills (#88828)bcahoon1-4/+5
2024-04-18[AMDGPU] Fix debug line table for MSG_DEALLOC_VGPRS optimization (#88924)Emma Pilkington1-2/+3
2024-04-18[AMDGPU][AtomicOptimizer] Fix DT update for divergent values with Iterative s...Pierre van Houtryve1-9/+20
2024-04-18[IR][PatternMatch] Only accept poison in getSplatValue() (#89159)Nikita Popov1-3/+3
2024-04-17AMDGPU: Fix not handling atomicrmw fadd in exotic address spaces correctlyMatt Arsenault1-1/+1
2024-04-17[AMDGPU] Fix predicates for BUFFER_ATOMIC_FMIN/FMAX patterns (#89066)Jay Foad1-1/+1
2024-04-17AMDGPU: Move libcall simplify into PeepholeEP (#88853)Matt Arsenault1-3/+10
2024-04-16[AMDGPU][CodeGen] Improve handling of memcpy for -Os/-Oz compilations (#87632)Shilei Tian1-0/+6
2024-04-16[AMDGPU] Stop reserving $vcc_hi in wave32 mode (#87783)Jay Foad1-7/+0
2024-04-16[AMDGPU] Fix implicit operands of VOPD cndmask instructions (#87788)Jay Foad1-0/+1
2024-04-15Resolve static analyser report on pointer dereferencing after null check (#88...mmoadeli1-18/+15
2024-04-13AMDGPU: Undo atomicrmw add/sub/xor 0 -> atomicrmw or canonicalization (#87533)Matt Arsenault1-2/+25
2024-04-12[AMDGPU] Fix a potential wrong return value indicating whether a pass modifie...Shilei Tian1-1/+1
2024-04-12[AArch64] Improve scheduling latency into Bundles (#86310)David Green2-3/+5
2024-04-10[AMDGPU] Add v2i32 to the VS_64 types. NFCI. (#88318)Stanislav Mekhanoshin2-5/+5
2024-04-10[AMDGPU] New clang option for emitting a waitcnt instruction after each memor...Jun Wang3-0/+15
2024-04-09[AArch64] Add costs for ST3 and ST4 instructions, modelled as store(shuffle)....David Green2-2/+4
2024-04-09[AMDGPU] Fix implicit $vcc operands after parsing MIR (#87781)Jay Foad2-0/+13
2024-04-04AMDGPULowerBufferFatPointers.cpp - fix Wunused-variable warning. NFC.Simon Pilgrim1-1/+1
2024-04-04AMDGPULowerBufferFatPointers.cpp - fix Wparentheses warning. NFC.Simon Pilgrim1-2/+2
2024-04-04[AMDGPU] Combine or remove redundant waitcnts at the end of each MBB (#87539)Jay Foad1-30/+15
2024-04-03[AMDGPU] Add a missing COV6 case to getAMDHSACodeObjectVersion() (#87492)Emma Pilkington1-0/+2
2024-04-03[AMDGPU][MC] Allow VOP3C dpp src1 to be imm or SGPR (#87418)Joe Nash3-61/+2
2024-04-03AMDGPU: Use PseudoInstr to name SIMCInstr for DSDIR and SOPs, NFC (#87537)Changpeng Fang2-40/+40
2024-04-03[AMDGPU][MC] Enables sgpr or imm src1 for float VOP3 DPP, but excludi… (#87...Joe Nash4-9/+33
2024-04-03[AMDGPU] Remove useless aliases for FLAT instructions. NFC. (#87462)Jay Foad1-2/+2
2024-04-02AMDGPU: Use PseudoInstr instead of Pseudo Mnemonic for SIMCInstr, NFC (#87420)Changpeng Fang1-2/+2
2024-04-01[AMDGPU] Use glue for convergence tokens at call-like operations (#86766)Sameer Sahasrabuddhe2-25/+17
2024-04-01[AMDGPU] Expose RTZ version of f16 interpolation for gfx11+ (#86614)Ruiling, Song2-1/+11
2024-03-31[AMDGPU] Use directive for kernarg preload header padding (#86004)Austin Kerbow1-12/+9
2024-03-31[AMDGPU] Extend MFMA padding option to gfx90a+ (#86768)Austin Kerbow1-0/+3
2024-03-30[AMDGPU] Use AMDGPU::isIntrinsicAlwaysUniform in isSDNodeAlwaysUniform (#87085)Jay Foad1-6/+1
2024-03-27[AMDGPU] Fix missing `IsExact` flag when expanding vector binary operator (#8...Shilei Tian1-0/+3
2024-03-27[FPEnv][AMDGPU] Correct AMDGPUSimplifyLibCalls handling of strictfp attribute...Kevin P. Neal1-0/+2
2024-03-27Reland [AMDGPU] MCExpr-ify MC layer kernel descriptor (#86494)Janek van Oirschot10-313/+570
2024-03-26Revert "Update amdgpu_gfx functions to use s0-s3 for inreg SGPR arguments on ...Thomas Symalla3-9/+4
2024-03-25AMDGPU: Simplify SMInstruction definitions, NFC (#86613)Changpeng Fang1-12/+1
2024-03-25AMDGPU: Rename intrinsics and remove f16/bf16 versions for load transpose (#8...Changpeng Fang4-12/+12
2024-03-25[AMDGPU] Use correct VGPR threshold for flagging ExcessRP regions in unified ...Jeffrey Byrnes1-3/+8
2024-03-25[AMDPU] Add support for idxen and bothen buffer load/store merging in SILoadS...David Stuttard1-0/+16
2024-03-25[AMDGPU][NFC] Rename Feature GFX11FullVGPRs to 1_5xVGPRs (#86468)Mariusz Sikora3-10/+12
2024-03-25[AMDGPU] Extend zero initialization of return values for TFE (#85759)David Stuttard7-74/+62
2024-03-25[AMDGPU] Handle non-register operands for S_SUB/ADD_U64_PSEUDO (#86104)Pierre van Houtryve1-2/+2
2024-03-25[MC] Make `MCParsedAsmOperand::getReg()` return `MCRegister` (#86444)Sergei Barannikov1-1/+1
2024-03-23[GlobalISel] Introduce G_TRAP, G_DEBUGTRAP, G_UBSANTRAP (#84941)Evgenii Kudriashov2-14/+17
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