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2024-04-04AMDGPULowerBufferFatPointers.cpp - fix Wunused-variable warning. NFC.Simon Pilgrim1-1/+1
2024-04-04AMDGPULowerBufferFatPointers.cpp - fix Wparentheses warning. NFC.Simon Pilgrim1-2/+2
2024-04-04[AMDGPU] Combine or remove redundant waitcnts at the end of each MBB (#87539)Jay Foad1-30/+15
2024-04-03[AMDGPU] Add a missing COV6 case to getAMDHSACodeObjectVersion() (#87492)Emma Pilkington1-0/+2
2024-04-03[AMDGPU][MC] Allow VOP3C dpp src1 to be imm or SGPR (#87418)Joe Nash3-61/+2
2024-04-03AMDGPU: Use PseudoInstr to name SIMCInstr for DSDIR and SOPs, NFC (#87537)Changpeng Fang2-40/+40
2024-04-03[AMDGPU][MC] Enables sgpr or imm src1 for float VOP3 DPP, but excludi… (#87...Joe Nash4-9/+33
2024-04-03[AMDGPU] Remove useless aliases for FLAT instructions. NFC. (#87462)Jay Foad1-2/+2
2024-04-02AMDGPU: Use PseudoInstr instead of Pseudo Mnemonic for SIMCInstr, NFC (#87420)Changpeng Fang1-2/+2
2024-04-01[AMDGPU] Use glue for convergence tokens at call-like operations (#86766)Sameer Sahasrabuddhe2-25/+17
2024-04-01[AMDGPU] Expose RTZ version of f16 interpolation for gfx11+ (#86614)Ruiling, Song2-1/+11
2024-03-31[AMDGPU] Use directive for kernarg preload header padding (#86004)Austin Kerbow1-12/+9
2024-03-31[AMDGPU] Extend MFMA padding option to gfx90a+ (#86768)Austin Kerbow1-0/+3
2024-03-30[AMDGPU] Use AMDGPU::isIntrinsicAlwaysUniform in isSDNodeAlwaysUniform (#87085)Jay Foad1-6/+1
2024-03-27[AMDGPU] Fix missing `IsExact` flag when expanding vector binary operator (#8...Shilei Tian1-0/+3
2024-03-27[FPEnv][AMDGPU] Correct AMDGPUSimplifyLibCalls handling of strictfp attribute...Kevin P. Neal1-0/+2
2024-03-27Reland [AMDGPU] MCExpr-ify MC layer kernel descriptor (#86494)Janek van Oirschot10-313/+570
2024-03-26Revert "Update amdgpu_gfx functions to use s0-s3 for inreg SGPR arguments on ...Thomas Symalla3-9/+4
2024-03-25AMDGPU: Simplify SMInstruction definitions, NFC (#86613)Changpeng Fang1-12/+1
2024-03-25AMDGPU: Rename intrinsics and remove f16/bf16 versions for load transpose (#8...Changpeng Fang4-12/+12
2024-03-25[AMDGPU] Use correct VGPR threshold for flagging ExcessRP regions in unified ...Jeffrey Byrnes1-3/+8
2024-03-25[AMDPU] Add support for idxen and bothen buffer load/store merging in SILoadS...David Stuttard1-0/+16
2024-03-25[AMDGPU][NFC] Rename Feature GFX11FullVGPRs to 1_5xVGPRs (#86468)Mariusz Sikora3-10/+12
2024-03-25[AMDGPU] Extend zero initialization of return values for TFE (#85759)David Stuttard7-74/+62
2024-03-25[AMDGPU] Handle non-register operands for S_SUB/ADD_U64_PSEUDO (#86104)Pierre van Houtryve1-2/+2
2024-03-25[MC] Make `MCParsedAsmOperand::getReg()` return `MCRegister` (#86444)Sergei Barannikov1-1/+1
2024-03-23[GlobalISel] Introduce G_TRAP, G_DEBUGTRAP, G_UBSANTRAP (#84941)Evgenii Kudriashov2-14/+17
2024-03-22[Target] Move SubRegIdxRanges from MCSubtargetInfo to TargetInfo. (#86245)Craig Topper1-2/+2
2024-03-22[AMDGPU] Support double type in atomic optimizer. (#84307)Pravin Jagtap1-4/+7
2024-03-22[NewPM][AMDGPU] Add AMDGPUPassRegistry.def (#86095)paperchalice2-98/+90
2024-03-21Revert "[AMDGPU] MCExpr-ify MC layer kernel descriptor" (#86151)Janek van Oirschot10-559/+304
2024-03-21AMDGPU: Use defset to cleanup marking MFMA intrinsics as divergent (#85915)Matt Arsenault1-76/+11
2024-03-21[AMDGPU] MCExpr-ify MC layer kernel descriptor (#80855)Janek van Oirschot10-304/+559
2024-03-21Update amdgpu_gfx functions to use s0-s3 for inreg SGPR arguments on targets ...SahilPatidar3-4/+9
2024-03-21(Reland) [AMDGPU] Run LowerLDS at the end of the fullLTO pipeline (#85626)Pierre van Houtryve1-0/+9
2024-03-21[AMDGPU][LowerModuleLDS] Refactor partially lowered module detection (#85793)Pierre van Houtryve1-15/+25
2024-03-21AMDGPU: Infer no-agpr usage in AMDGPUAttributor (#85948)Matt Arsenault2-31/+95
2024-03-20[AMDGPU] Copy SOP properties from pseudo to real. NFCI. (#85997)Stanislav Mekhanoshin1-0/+13
2024-03-20[AMDGPU] Simplify definition of GLOBAL_LOAD_TR Real instructionsJay Foad1-4/+8
2024-03-20[AMDGPU] Remove FLAT_Real_AllAddr_gfx11 in favor of GLOBAL_Real_AllAddr_gfx11Jay Foad1-38/+28
2024-03-20[AMDGPU] Simplify GFX11/GFX12 FLAT instruction definitions. NFC. (#85819)Jay Foad1-368/+363
2024-03-20[IR] Change representation of getelementptr inrange (#84341)Nikita Popov1-1/+1
2024-03-19[AMDGCN] Use ZExt when handling indices in insertment element (#85718)Peter Rong1-2/+2
2024-03-19AMDGPU: Treat SWMMAC the same as MFMA and other WMMA for sched_barrier (#85721)Changpeng Fang1-1/+1
2024-03-19[NFC][RemoveDIs] Use iterators for insertion at various call-sites (#84736)Jeremy Morse2-12/+16
2024-03-19[AMDGPU][PromoteAlloca] Whole-function alloca promotion to vector (#84735)Pierre van Houtryve1-26/+108
2024-03-19[AMDGPU][PromoteAlloca] Drop bitcast handling (#85747)Pierre van Houtryve1-8/+0
2024-03-18Silence potential overflow warning (#83272)Martin Wehking1-2/+2
2024-03-18[AMDGPU] Remove unneeded addr mode predicates on FLAT Real instructions (#85641)Jay Foad1-15/+5
2024-03-18Revert "[AMDGPU] Run LowerLDS at the end of the fullLTO pipeline (#75333)"pvanhout1-9/+0
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