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path: root/llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
AgeCommit message (Expand)AuthorFilesLines
2023-05-12AMDGPU: Force sc0 and sc1 on stores for gfx940 and gfx941Konstantin Zhuravlyov1-2/+21
2023-03-08[AMDGPU] Skip buffer_wbl2 before atomic fence acquireStanislav Mekhanoshin1-2/+7
2023-02-07[NFC][TargetParser] Remove llvm/Support/TargetParser.hArchibald Elliott1-1/+1
2022-12-17std::optional::value => operator*/operator->Fangrui Song1-4/+4
2022-12-14[AMDGPU] Stop using make_pair and make_tuple. NFC.Jay Foad1-30/+18
2022-12-13[CodeGen] llvm::Optional => std::optionalFangrui Song1-20/+20
2022-12-08[llvm] Use std::nullopt instead of None in comments (NFC)Kazu Hirata1-4/+5
2022-12-02[Target] Use std::nullopt instead of None (NFC)Kazu Hirata1-10/+10
2022-09-02[AMDGPU][NFC] Fix typo in commment: replace SiMemOpInfo by SIMemOpInfoJuan Manuel MARTINEZ CAAMAÑO1-2/+2
2022-07-13[llvm] Use value instead of getValue (NFC)Kazu Hirata1-4/+4
2022-06-25Revert "Don't use Optional::hasValue (NFC)"Kazu Hirata1-4/+4
2022-06-25Don't use Optional::hasValue (NFC)Kazu Hirata1-4/+4
2022-06-20[llvm] Don't use Optional::getValue (NFC)Kazu Hirata1-3/+3
2022-06-10[AMDGPU] Update dlc usage for GFX11Jay Foad1-1/+112
2022-03-16Cleanup codegen includesserge-sans-paille1-0/+1
2022-03-14[AMDGPU] gfx940 memory modelStanislav Mekhanoshin1-0/+354
2022-03-11[AMDGPU] gfx940 MUBUF format changesStanislav Mekhanoshin1-1/+3
2022-03-10Revert "Cleanup codegen includes"Nico Weber1-1/+0
2022-03-10Cleanup codegen includesserge-sans-paille1-0/+1
2022-02-18[AMDGPU][NFC] Fix typosSebastian Neubauer1-3/+3
2021-11-26[AMDGPU] Add SIMemoryLegalizer comments to clarify bit usageCarl Ritson1-8/+30
2021-11-05[AMDGPU] NFC formatting fixes in SIMemoryLegalizerJay Foad1-14/+14
2021-08-10[AMDGPU] Support non-strictly stronger memory orderings in SIMemoryLegalizerTony Tye1-7/+3
2021-06-30[AMDGPU] Update gfx90a memory model supportTony Tye1-0/+74
2021-06-21Rename MachineMemOperand::getOrdering -> getSuccessOrdering.Eli Friedman1-4/+4
2021-04-07[AMDGPU] Update gfx90a memory model supportTony Tye1-91/+1
2021-03-23[AMDGPU] Only unbundle memory accesses in SIMemoryLegalizerCarl Ritson1-1/+1
2021-03-15[AMDGPU] Use single cache policy operandStanislav Mekhanoshin1-20/+19
2021-02-17[AMDGPU] gfx90a supportStanislav Mekhanoshin1-0/+409
2021-02-17[AMDGPU] Correct rmw atomics s_waitcnt generationTony Tye1-1/+1
2021-02-15[AMDGPU] Add two TSFlags: IsAtomicNoRtn and IsAtomicRtnStanislav Mekhanoshin1-1/+1
2021-02-14[AMDGPU] Limit memory scope for scratch, LDS and GDSTony Tye1-10/+42
2021-01-20[NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargetsdfukalov1-1/+2
2021-01-09[AMDGPU] Add volatile support to SIMemoryLegalizerTony1-31/+115
2021-01-07[NFC][AMDGPU] Reduce include files dependency.dfukalov1-20/+1
2020-12-08[AMDGPU] Add new pseudos for indirect addressing with VGPR IndexingAustin Kerbow1-1/+2
2020-10-22[NFC][AMDGPU] Reorder SIMemoryLegalizer functions to be consistentTony1-122/+122
2020-10-19[AMDGPU] Correct comment typo in SIMemoryLegaliizer.cppTony1-1/+1
2020-10-19[AMDGPU] Simplify cumode handling in SIMemoryLegalizerTony1-8/+9
2020-10-15[AMDGPU] Correct typos in SIMemoryLegalizer.cpp commentsTony1-4/+4
2020-10-14[AMDGPU] Cleanup memory legalizer interfacesTony1-98/+124
2020-07-27[AMDGPU] Make generating cache invalidating instructions optionalPiotr Sobczak1-2/+6
2020-04-24[AMDGPU] Skip generating cache invalidating instructions on AMDPALPiotr Sobczak1-0/+13
2020-01-24[AMDGPU] Bundle loads before post-RA schedulerStanislav Mekhanoshin1-0/+15
2019-08-15[llvm] Migrate llvm::make_unique to std::make_uniqueJonas Devlieghere1-3/+3
2019-07-12Delete dead storesFangrui Song1-1/+1
2019-05-06[AMDGPU] gfx1010 memory legalizerStanislav Mekhanoshin1-1/+262
2019-03-25AMDGPU: Add support for cross address space synchronization scopesKonstantin Zhuravlyov1-20/+30
2019-01-19Update the file headers across all of the LLVM projects in the monorepoChandler Carruth1-4/+3
2018-12-10[AMDGPU] Change the l1 flush instruction for AMDPAL/MESA3D.Neil Henning1-1/+7