aboutsummaryrefslogtreecommitdiff
path: root/llvm/lib/CodeGen/VirtRegMap.cpp
AgeCommit message (Expand)AuthorFilesLines
2019-08-13Eliminate implicit Register->unsigned conversions in VirtRegMap. NFCDaniel Sanders1-32/+31
2019-08-01Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Re...Daniel Sanders1-11/+11
2019-05-20RegAlloc: Fix verifier error with undef identity copiesMatt Arsenault1-1/+1
2019-01-19Update the file headers across all of the LLVM projects in the monorepoChandler Carruth1-4/+3
2018-08-15[RegAlloc] Check that subreg liveness tracking applies to given virtual regKrzysztof Parzyszek1-1/+1
2018-06-14Re-apply "[VirtRegRewriter] Avoid clobbering registers when expanding copy bu...Justin Bogner1-7/+46
2018-06-14Revert "[VirtRegRewriter] Avoid clobbering registers when expanding copy bund...Justin Bogner1-46/+7
2018-06-14[VirtRegRewriter] Avoid clobbering registers when expanding copy bundlesJustin Bogner1-7/+46
2018-05-14Rename DEBUG macro to LLVM_DEBUG.Nicola Zaghen1-9/+8
2018-04-30IWYU for llvm-config.h in llvm, additions.Nico Weber1-0/+1
2018-02-23[MachineOperand][Target] MachineOperand::isRenamable semantics changesGeoff Berry1-1/+1
2017-12-18LiveStacks: Rename LiveStack.{h|cpp} to LiveStacks.{h|cpp}; NFCMatthias Braun1-1/+1
2017-12-13Rename LiveIntervalAnalysis.h to LiveIntervals.hMatthias Braun1-1/+1
2017-12-12[MachineOperand][MIR] Add isRenamable to MachineOperand.Geoff Berry1-0/+1
2017-12-07[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.Francis Visoiu Mistrih1-5/+5
2017-11-28[CodeGen] Print register names in lowercase in both MIR and debug outputFrancis Visoiu Mistrih1-2/+2
2017-11-28[CodeGen] Rename functions PrintReg* to printReg*Francis Visoiu Mistrih1-3/+3
2017-11-17Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie1-3/+3
2017-11-08Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layeringDavid Blaikie1-1/+1
2017-10-15Reverting r315590; it did not include changes for llvm-tblgen, which is causi...Aaron Ballman1-1/+1
2017-10-12[dump] Remove NDEBUG from test to enable dump methods [NFC]Don Hinton1-1/+1
2017-09-13[CodeGen] Fix some Clang-tidy modernize and Include What You Use warnings; ot...Eugene Zelenko1-13/+24
2017-08-16[VirtRegRewriter] Properly model the register liveness on undef subreg defini...Quentin Colombet1-1/+29
2017-06-08RegAllocPBQP: Do not assign reserved physical registerMatthias Braun1-0/+11
2017-04-24Move size and alignment information of regclass to TargetRegisterInfoKrzysztof Parzyszek1-2/+3
2017-03-21SplitKit: Fix subreg copy related problemsMatthias Braun1-1/+3
2017-03-17SplitKit: Correctly implement partial subregister copiesMatthias Braun1-0/+31
2017-03-17VirtRegMap: Correctly deal with bundles when deleting identity copies.Matthias Braun1-7/+9
2016-12-16Implement LaneBitmask::any(), use it to replace !none(), NFCIKrzysztof Parzyszek1-1/+1
2016-12-15Extract LaneBitmask into a separate typeKrzysztof Parzyszek1-3/+3
2016-08-25MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compu...Matthias Braun1-1/+1
2016-08-24Create subranges for new intervals resulting from live interval splittingKrzysztof Parzyszek1-0/+1
2016-07-28MachineFunction: Return reference for getFrameInfo(); NFCMatthias Braun1-3/+3
2016-07-09VirtRegMap: Replace some identity copies with KILL instructions.Matthias Braun1-9/+27
2016-06-02Use false for bool instead of 0Matt Arsenault1-1/+1
2016-04-18[NFC] Header cleanupMehdi Amini1-2/+0
2016-03-29Add MachineVerifier check for AllVRegsAllocated MachineFunctionPropertyDerek Schuff1-1/+4
2016-02-27CodeGen: Take MachineInstr& in SlotIndexes and LiveIntervals, NFCDuncan P. N. Exon Smith1-2/+2
2016-01-29Annotate dump() methods with LLVM_DUMP_METHOD, addressing Richard Smith r2591...Yaron Keren1-1/+1
2015-11-17Assume lane masks are always preciseMatthias Braun1-8/+0
2015-10-09CodeGen: Remove implicit ilist iterator conversions, NFCDuncan P. N. Exon Smith1-1/+1
2015-09-25TargetRegisterInfo: Add typedef unsigned LaneBitmask and use it where apropri...Matthias Braun1-3/+3
2015-09-09Save LaneMask with livein registersMatthias Braun1-7/+1
2015-09-09VirtRegMap: Improve addMBBLiveIns() using SlotIndex::MBBIndexIterator; NFCMatthias Braun1-25/+62
2015-07-14MachineRegisterInfo: Remove UsedPhysReg infrastructureMatthias Braun1-73/+0
2015-06-16VirtRegMap: Add undef flag when reading undefined subregisters.Matthias Braun1-18/+63
2015-05-29MachineCopyPropagation: Remove the copies instead of using KILL instructions.Matthias Braun1-11/+5
2015-05-22Compile time improvements to VirtRegRewriter.Puyan Lotfi1-4/+7
2015-03-19Do not track subregister liveness when it brings no benefitsMatthias Braun1-1/+1
2014-12-11LiveInterval: Use range based for loops for subregister ranges.Matthias Braun1-4/+3
generated by cgit v1.1 at 2024-09-08 02:57:52 +0000