aboutsummaryrefslogtreecommitdiff
path: root/llvm/lib/CodeGen/VirtRegMap.cpp
AgeCommit message (Expand)AuthorFilesLines
2023-10-11[SlotIndexes] Use upper/lower bound terminology for MBB searches. NFC. (#68802)Jay Foad1-2/+2
2023-10-11[VirtRegMap] Simplify condition after #65729Jay Foad1-1/+1
2023-10-11Clean up strange uses of getAnalysisIfAvailable (#65729)Jay Foad1-1/+1
2023-08-15Fix typos in commentsJay Foad1-1/+1
2023-06-16[MC] Add MCRegisterInfo::regunits for iteration over register unitsSergei Barannikov1-5/+4
2023-04-17Fix uninitialized pointer members in CodeGenAkshay Khadse1-8/+8
2023-03-22[CodeGen] Fix type of MachineRegisterInfo::RegAllocHints. NFC.Jay Foad1-3/+3
2023-01-05Move from llvm::makeArrayRef to ArrayRef deduction guides - llvm/ partserge-sans-paille1-1/+1
2022-12-07[NFC] Use Register instead of unsigned for variables that receive a Register ...Gregory Alfonso1-2/+2
2021-11-11[CodeGen] Use MachineInstr::operands (NFC)Kazu Hirata1-5/+1
2021-11-08[llvm] Use make_early_inc_range (NFC)Kazu Hirata1-14/+11
2021-06-11[CodeGen][regalloc] Don't align stack slots if the stack can't be realignedTomas Matheson1-0/+7
2021-05-27VirtRegMap: Preserve LiveDebugVariablesMatt Arsenault1-3/+12
2021-04-29VirtRegMap: Support partially allocated virtual registersMatt Arsenault1-7/+40
2021-04-29VirtRegMap: Add pass option to not clear virt regsMatt Arsenault1-7/+20
2021-02-26[NFC] Const-ed 2 APIs in VirtRegMapMircea Trofin1-2/+2
2020-12-10[X86] AMX programming model.Luo, Yuanke1-0/+1
2020-11-02[NFC][regalloc] Use MCRegister appropriatelyMircea Trofin1-3/+3
2020-10-08[NFC][MC] MCRegister API typing.Mircea Trofin1-1/+1
2020-10-06Fix reordering of instructions during VirtRegRewriter unbundlingCarl Ritson1-1/+1
2020-08-10Unbundle KILL bundles in VirtRegRewriterStanislav Mekhanoshin1-3/+3
2020-04-02[Alignment][NFC] Use more Align versions of various functionsGuillaume Chatelet1-2/+2
2019-08-13Eliminate implicit Register->unsigned conversions in VirtRegMap. NFCDaniel Sanders1-32/+31
2019-08-01Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Re...Daniel Sanders1-11/+11
2019-05-20RegAlloc: Fix verifier error with undef identity copiesMatt Arsenault1-1/+1
2019-01-19Update the file headers across all of the LLVM projects in the monorepoChandler Carruth1-4/+3
2018-08-15[RegAlloc] Check that subreg liveness tracking applies to given virtual regKrzysztof Parzyszek1-1/+1
2018-06-14Re-apply "[VirtRegRewriter] Avoid clobbering registers when expanding copy bu...Justin Bogner1-7/+46
2018-06-14Revert "[VirtRegRewriter] Avoid clobbering registers when expanding copy bund...Justin Bogner1-46/+7
2018-06-14[VirtRegRewriter] Avoid clobbering registers when expanding copy bundlesJustin Bogner1-7/+46
2018-05-14Rename DEBUG macro to LLVM_DEBUG.Nicola Zaghen1-9/+8
2018-04-30IWYU for llvm-config.h in llvm, additions.Nico Weber1-0/+1
2018-02-23[MachineOperand][Target] MachineOperand::isRenamable semantics changesGeoff Berry1-1/+1
2017-12-18LiveStacks: Rename LiveStack.{h|cpp} to LiveStacks.{h|cpp}; NFCMatthias Braun1-1/+1
2017-12-13Rename LiveIntervalAnalysis.h to LiveIntervals.hMatthias Braun1-1/+1
2017-12-12[MachineOperand][MIR] Add isRenamable to MachineOperand.Geoff Berry1-0/+1
2017-12-07[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.Francis Visoiu Mistrih1-5/+5
2017-11-28[CodeGen] Print register names in lowercase in both MIR and debug outputFrancis Visoiu Mistrih1-2/+2
2017-11-28[CodeGen] Rename functions PrintReg* to printReg*Francis Visoiu Mistrih1-3/+3
2017-11-17Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie1-3/+3
2017-11-08Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layeringDavid Blaikie1-1/+1
2017-10-15Reverting r315590; it did not include changes for llvm-tblgen, which is causi...Aaron Ballman1-1/+1
2017-10-12[dump] Remove NDEBUG from test to enable dump methods [NFC]Don Hinton1-1/+1
2017-09-13[CodeGen] Fix some Clang-tidy modernize and Include What You Use warnings; ot...Eugene Zelenko1-13/+24
2017-08-16[VirtRegRewriter] Properly model the register liveness on undef subreg defini...Quentin Colombet1-1/+29
2017-06-08RegAllocPBQP: Do not assign reserved physical registerMatthias Braun1-0/+11
2017-04-24Move size and alignment information of regclass to TargetRegisterInfoKrzysztof Parzyszek1-2/+3
2017-03-21SplitKit: Fix subreg copy related problemsMatthias Braun1-1/+3
2017-03-17SplitKit: Correctly implement partial subregister copiesMatthias Braun1-0/+31
2017-03-17VirtRegMap: Correctly deal with bundles when deleting identity copies.Matthias Braun1-7/+9
generated by cgit v1.1 at 2024-08-01 01:39:37 +0000