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path: root/llvm/lib/CodeGen/TargetInstrInfo.cpp
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2024-04-11[clang][llvm] Remove "implicit-section-name" attribute (#87906)Arthur Eubanks1-2/+1
2024-04-11[MachineCombiner][NFC] Split target-dependent patternsPengcheng Wang1-8/+11
2024-03-17[CodeGen] Use LocationSize for MMO getSize (#84751)David Green1-1/+2
2024-03-06[Codegen] Make Width in getMemOperandsWithOffsetWidth a LocationSize. (#83875)David Green1-1/+1
2023-12-05TargetInstrInfo, TargetSchedule: fix non-NFC parts of 9468de4 (#74338)Ramkumar Ramachandra1-1/+1
2023-12-04[TargetInstrInfo] update INLINEASM memoperands once (#74135)Nick Desaulniers1-22/+21
2023-12-01Fix MSVC signed/unsigned mismatch warning. NFC.Simon Pilgrim1-1/+1
2023-12-01TargetInstrInfo: make getOperandLatency return optional (NFC) (#73769)Ramkumar Ramachandra1-12/+11
2023-11-29[X86InstrInfo] support memfold on spillable inline asm (#70832)Nick Desaulniers1-12/+21
2023-11-22[AArch64] Use the same fast math preservation for MachineCombiner reassociati...Craig Topper1-4/+16
2023-11-21reapply "[TargetInstrInfo] enable foldMemoryOperand for InlineAsm (#70743)" (...Nick Desaulniers1-0/+62
2023-11-19Revert "[TargetInstrInfo] enable foldMemoryOperand for InlineAsm (#70743)"Bill Wendling1-62/+0
2023-11-17[TargetInstrInfo] enable foldMemoryOperand for InlineAsm (#70743)Nick Desaulniers1-0/+62
2023-11-03[InlineAsm] Steal a bit to denote a register is foldable (#70738)Nick Desaulniers1-0/+4
2023-10-27[BasicBlockSections] Apply path cloning with -basic-block-sections. (#68860)Rahman Lavaee1-3/+12
2023-09-13reland [InlineAsm] wrap ConstraintCode in enum class NFC (#66264)Nick Desaulniers1-1/+1
2023-09-13Revert "[InlineAsm] wrap ConstraintCode in enum class NFC (#66003)"Reid Kleckner1-1/+1
2023-09-13[InlineAsm] wrap ConstraintCode in enum class NFC (#66003)Nick Desaulniers1-1/+1
2023-09-11[InlineAsm] refactor InlineAsm class NFC (#65649)Nick Desaulniers1-9/+8
2023-08-31[InlineAsm] wrap Kind in enum class NFCNick Desaulniers1-1/+1
2023-08-24[CodeGen][AArch64] Don't split functions with a red zone on AArch64Daniel Hoekwater1-0/+20
2023-08-19[llvm] Remove redundant control flow statements (NFC)Kazu Hirata1-1/+0
2023-08-07[TII] NFCI: Simplify the interface for isTriviallyReMaterializableSander de Smalen1-1/+1
2023-07-31Reapply "[CodeGen]Allow targets to use target specific COPY instructions for ...Matt Arsenault1-3/+4
2023-07-27[CodeGen] Store call frame size in MachineBasicBlockJay Foad1-0/+16
2023-07-26Revert "[CodeGen]Allow targets to use target specific COPY instructions for l...Vitaly Buka1-4/+3
2023-07-07[CodeGen]Allow targets to use target specific COPY instructions for live rang...Yashwant Singh1-3/+4
2023-07-04[CodeGen] Move lowerCopy from expandPostRA to TIIYashwant Singh1-0/+55
2023-04-25[DebugInfo][CSInfo] Avoid crash when defining super-regsJeremy Morse1-5/+1
2023-04-14Account for PATCHABLE instrs in Branch RelaxationDaniel Hoekwater1-3/+18
2023-03-30[MachineOutliner] Fix label outlining regression introduced in D125072duk1-4/+15
2023-03-13[MachineCombiner] Preserve debug instruction numberFelipe de Azevedo Piovezan1-0/+11
2023-03-08[CodeGen] Prevent nullptr deref in genAlternativeCodeSequenceFelipe de Azevedo Piovezan1-3/+1
2023-02-17[MachineCombiner] Support local strategy for tracesAnton Sidorenko1-0/+5
2023-02-09[MachineOutliner] Make getOutliningType partially target-independentduk1-0/+66
2023-01-23[MC] Make more use of MCInstrDesc::operands. NFC.Jay Foad1-3/+3
2023-01-13[CodeGen] Remove uses of Register::isPhysicalRegister/isVirtualRegister. NFCCraig Topper1-19/+17
2023-01-13[MachineCombiner] Lift same-bb restriction for reassociable ops.Florian Hahn1-2/+6
2022-12-17[CodeGen] Additional Register argument to storeRegToStackSlot/loadRegFromStac...Christudasan Devadasan1-2/+3
2022-12-16[Transforms,CodeGen] std::optional::value => operator*/operator->Fangrui Song1-1/+1
2022-12-07[MachineCombiner] Extend reassociation logic to handle inverse instructionsAnton Sidorenko1-14/+144
2022-12-04[Target] llvm::Optional => std::optionalFangrui Song1-1/+1
2022-12-02[CodeGen] Use std::nullopt instead of None (NFC)Kazu Hirata1-6/+6
2022-11-16[AArch64][MachineCombiner] Use MIMetadata to copy pcsections metadata to reas...David Green1-2/+2
2022-10-13[NFC] Use forward decl of MachineCombinerPattern enum to reduce dependenciesAnton Sidorenko1-0/+1
2022-08-02Outliner: add "target-cpu" feature from source function to outlinedTim Northover1-0/+2
2022-07-18CodeGen: Remove AliasAnalysis from regallocMatt Arsenault1-2/+2
2022-03-16Cleanup codegen includesserge-sans-paille1-2/+0
2022-03-10Revert "Cleanup codegen includes"Nico Weber1-0/+2
2022-03-10Cleanup codegen includesserge-sans-paille1-2/+0