| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2019-10-19 | Prune Analysis includes from SelectionDAG.h | Reid Kleckner | 1 | -1/+2 |
| 2019-01-19 | Update the file headers across all of the LLVM projects in the monorepo | Chandler Carruth | 1 | -4/+3 |
| 2018-09-19 | ScheduleDAG: Cleanup dumping code; NFC | Matthias Braun | 1 | -2/+2 |
| 2018-07-16 | [CodeGen] Fix inconsistent declaration parameter name | Fangrui Song | 1 | -1/+1 |
| 2018-03-23 | Fix layering of MachineValueType.h by moving it from CodeGen to Support | David Blaikie | 1 | -1/+1 |
| 2017-01-11 | [Target] Fix some Clang-tidy modernize and Include What You Use warnings; oth... | Eugene Zelenko | 1 | -3/+16 |
| 2015-10-15 | [SelectionDAG] Remove dead code. NFC. | Benjamin Kramer | 1 | -6/+0 |
| 2015-06-23 | Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) | Alexander Kornienko | 1 | -1/+1 |
| 2015-06-22 | Avoid a Symbol -> Name -> Symbol conversion. | Rafael Espindola | 1 | -0/+1 |
| 2015-06-19 | Fixed/added namespace ending comments using clang-tidy. NFC | Alexander Kornienko | 1 | -1/+1 |
| 2015-04-11 | Use 'override/final' instead of 'virtual' for overridden methods | Alexander Kornienko | 1 | -1/+1 |
| 2014-08-13 | Canonicalize header guards into a common format. | Benjamin Kramer | 1 | -2/+2 |
| 2014-04-16 | [C++11] More 'nullptr' conversion. In some cases just using a boolean check i... | Craig Topper | 1 | -1/+1 |
| 2014-03-08 | [C++11] Add 'override' keyword to virtual methods that override their base cl... | Craig Topper | 1 | -3/+3 |
| 2013-09-11 | Revert "Give internal classes hidden visibility." | Benjamin Kramer | 1 | -1/+1 |
| 2013-09-11 | Give internal classes hidden visibility. | Benjamin Kramer | 1 | -1/+1 |
| 2013-02-20 | Fix #includes, so we include only what we really need. | Jakub Staszak | 1 | -1/+1 |
| 2012-12-13 | Change TargetLowering::getRepRegClassFor to take an MVT, instead of | Patrik Hagglund | 1 | -2/+2 |
| 2012-12-11 | Revert EVT->MVT changes, r169836-169851, due to buildbot failures. | Patrik Hagglund | 1 | -2/+2 |
| 2012-12-11 | Change TargetLowering::getRepRegClassFor to take an MVT, instead of | Patrik Hagglund | 1 | -2/+2 |
| 2012-10-17 | Add a really faster pre-RA scheduler (-pre-RA-sched=linearize). It doesn't use | Evan Cheng | 1 | -1/+2 |
| 2012-10-08 | misched: remove forceUnitLatencies. Defaults are handled by the default Sched... | Andrew Trick | 1 | -0/+6 |
| 2012-08-07 | Add SelectionDAG::getTargetIndex. | Jakob Stoklund Olesen | 1 | -0/+1 |
| 2012-06-05 | misched: API for minimum vs. expected latency. | Andrew Trick | 1 | -6/+0 |
| 2012-03-07 | misched preparation: rename core scheduler methods for consistency. | Andrew Trick | 1 | -6/+6 |
| 2012-03-07 | misched preparation: clarify ScheduleDAG and ScheduleDAGInstrs roles. | Andrew Trick | 1 | -4/+5 |
| 2012-03-07 | misched preparation: modularize schedule emission. | Andrew Trick | 1 | -0/+8 |
| 2012-03-07 | misched preparation: modularize schedule printing. | Andrew Trick | 1 | -0/+2 |
| 2012-03-07 | misched preparation: modularize schedule verification. | Andrew Trick | 1 | -0/+4 |
| 2012-03-07 | Cleanup in preparation for misched: Move DAG visualization logic. | Andrew Trick | 1 | -0/+2 |
| 2012-03-07 | Cleanup: DAG building is specific to either SD or MI scheduling. Not part of ... | Andrew Trick | 1 | -1/+1 |
| 2012-01-18 | Add a RegisterMaskSDNode class. | Jakob Stoklund Olesen | 1 | -0/+1 |
| 2011-06-27 | The index stored in the RegDefIter is one after the current index. When gett... | Owen Anderson | 1 | -1/+1 |
| 2011-06-15 | Add a new MVT::untyped. This will be used in future work for modelling ISA f... | Owen Anderson | 1 | -0/+8 |
| 2011-04-07 | Added a check in the preRA scheduler for potential interference on a | Andrew Trick | 1 | -0/+6 |
| 2011-02-04 | Introducing a new method of tracking register pressure. We can't | Andrew Trick | 1 | -2/+30 |
| 2010-12-21 | rename MVT::Flag to MVT::Glue. "Flag" is a terrible name for | Chris Lattner | 1 | -1/+1 |
| 2010-09-10 | Teach if-converter to be more careful with predicating instructions that would | Evan Cheng | 1 | -0/+1 |
| 2010-06-10 | Code refactoring, no functionality changes. | Evan Cheng | 1 | -1/+4 |
| 2010-05-20 | Allow targets more controls on what nodes are scheduled by reg pressure, what... | Evan Cheng | 1 | -12/+1 |
| 2010-05-20 | Add a hybrid bottom up scheduler that reduce register usage while avoiding | Evan Cheng | 1 | -0/+9 |
| 2010-05-01 | Get rid of the EdgeMapping map. Instead, just check for BasicBlock | Dan Gohman | 1 | -2/+1 |
| 2010-04-07 | Three changes: | Chris Lattner | 1 | -1/+2 |
| 2010-01-22 | Teach pre-regalloc scheduler to schedule loads from nearby addresses. It may ... | Evan Cheng | 1 | -0/+4 |
| 2009-10-30 | Initial target-independent CodeGen support for BlockAddresses. | Dan Gohman | 1 | -0/+1 |
| 2009-10-10 | Create a new InstrEmitter class for translating SelectionDAG nodes | Dan Gohman | 1 | -60/+0 |
| 2009-10-09 | The ScheduleDAG framework now requires an AliasAnalysis argument, though | Dan Gohman | 1 | -1/+1 |
| 2009-09-25 | Improve MachineMemOperand handling. | Dan Gohman | 1 | -8/+3 |
| 2009-09-18 | Enhance EmitInstrWithCustomInserter() so target can specify CFG changes that ... | Evan Cheng | 1 | -2/+4 |
| 2009-04-13 | Rename COPY_TO_SUBCLASS to COPY_TO_REGCLASS, and generalize | Dan Gohman | 1 | -2/+2 |
