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path: root/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
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2024-04-19[SelectionDAG] Require UADDO_CARRY carryin and carryout to have the same type...Craig Topper1-1/+0
2024-04-09[Legalizer] Soften EXTRACT_ELEMENT on ppcf128 (#77412)Qiu Chaofan1-0/+1
2024-02-26[RISCV] Use PromoteSetCCOperands to promote operands for UMAX/UMIN during typ...Craig Topper1-14/+1
2024-02-23[RISCV][VP] Introduce vp saturating addition/subtraction and RISC-V support. ...Yeting Kuo1-0/+2
2024-02-13[LLVM] Add `__builtin_readsteadycounter` intrinsic and builtin for realtime c...Joseph Huber1-1/+1
2024-01-05DAG: Implement promotion for strict_fp_round (#74332)Matt Arsenault1-0/+2
2023-12-22DAG: Implement promotion for strict_fpextend (#74310)Matt Arsenault1-0/+1
2023-12-21[RISCV] Add codegen support for experimental.vp.splice (#74688)Craig Topper1-0/+1
2023-12-07Implement SoftPromoteHalf for FFREXP. (#74076)Harald van Dijk1-0/+1
2023-11-05[VP][RISCV] Add llvm.experimental.vp.reverse. (#70405)Craig Topper1-0/+1
2023-11-03LegalizeVectorTypes: fix bug in widening of vec result in xrint (#71198)Ramkumar Ramachandra1-0/+1
2023-11-02LegalizeIntegerTypes: implement PromoteIntRes for xrint (#71055)Ramkumar Ramachandra1-0/+1
2023-10-25[DAG] WidenVectorOperand - add basic handling for *_EXTEND_VECTOR_INREG nodesSimon Pilgrim1-0/+1
2023-10-19ISel: introduce vector ISD::LRINT, ISD::LLRINT; custom RISCV lowering (#66924)Ramkumar Ramachandra1-1/+1
2023-09-18[SelectionDAG][RISCV][PowerPC][X86] Use TargetConstant for immediates for ISD...Craig Topper1-1/+0
2023-09-01IR: Add llvm.exp10 intrinsicMatt Arsenault1-0/+2
2023-08-14[LegalizeTypes][NFC] Combine ExpandIntOp_{S,U}INT_TO_FP to ExpandIntOp_XINT_T...Alex Bradbury1-2/+1
2023-08-14[LegalizeTypes][NFC] Combine ExpandIntRes_FP_TO_{S,U}INT to ExpandIntRes_FP_T...Alex Bradbury1-2/+1
2023-08-11[LegalizeTypes] Support promotion for vp bitmanip sdnodes.Yeting Kuo1-0/+1
2023-07-05DAG: Implement soften float for ffrexpMatt Arsenault1-0/+1
2023-06-28IR: Add llvm.frexp intrinsicMatt Arsenault1-0/+4
2023-06-28[LegalizeTypes] Combine PromoteIntRes_VECTOR_DEINTERLEAVE and PromoteIntRes_V...Craig Topper1-2/+1
2023-06-16[DAG] Unroll opereand when its type is illegal for ldexp.tianleli1-1/+1
2023-06-15Recommit "[SelectionDAG][RISCV] Add very basic PromoteIntegerResult/Op suppor...Craig Topper1-0/+2
2023-06-15Revert "[SelectionDAG][RISCV] Add very basic PromoteIntegerResult/Op support ...Alan Zhao1-2/+0
2023-06-14[SelectionDAG][RISCV] Add very basic PromoteIntegerResult/Op support for VP_S...Craig Topper1-0/+2
2023-06-06IR: Add llvm.ldexp and llvm.experimental.constrained.ldexp intrinsicsMatt Arsenault1-9/+10
2023-05-29[SelectionDAG] Implement soft FP legalisation for bf16 FP_EXTEND and BF16_TO_FPAlex Bradbury1-0/+1
2023-05-24[LegalizeType][X86] Support WidenVecRes_AssertZext and SplitVecRes_AssertZext...Bing1 Yu1-0/+2
2023-04-29[SelectionDAG] Rename ADDCARRY/SUBCARRY to UADDO_CARRY/USUBO_CARRY (NFC)Sergei Barannikov1-3/+3
2023-03-03[IR][Legalization] Promote illegal deinterleave and interleave vectorsCaroline Concatto1-0/+2
2023-03-01[IR][Legalization] Split illegal deinterleave and interleave vectorsCaroline Concatto1-0/+2
2023-01-14[Codegen][LegalizeIntegerTypes] New legalization strategy for scalar shifts: ...Roman Lebedev1-0/+1
2023-01-08[SelectionDAG][AVR] Add support for lrint and lround intrinsicsAyke van Laethem1-1/+1
2022-12-19[Intrinsic] Rename flt.rounds intrinsic to get.roundingQiu Chaofan1-2/+2
2022-12-13[AMDGPU] Add bf16 storage supportPierre van Houtryve1-1/+1
2022-08-30[LegalizeTypes] Support widen result for VECTOR_REVERSE.wanglian1-0/+1
2022-08-19[VP] Add splitting for VP_STRIDED_STORE and VP_STRIDED_LOADLorenzo Albano1-0/+3
2022-08-04[VP] Add widening for VP_STRIDED_LOAD and VP_STRIDED_STORELorenzo Albano1-0/+2
2022-07-20[VP] Legalize the stride operand for EXPERIMENTAL_VP_STRIDED SDNodesLorenzo Albano1-0/+2
2022-07-15[stackmaps] Legalise patchpoint arguments.Edd Barrett1-0/+3
2022-07-06[stackmaps] Start legalizing live variable operandsEdd Barrett1-0/+3
2022-06-17[LegalizeTypes][NFC] Merge promote SPLAT_VECTOR and promote SCALAR_TO_VECTOR ...Lian Wang1-4/+2
2022-05-07[LegalizeTypes] Don't assume fshl/fshr shift amount type matches the other op...Craig Topper1-0/+1
2022-04-26Intrinsic for checking floating point classSerge Pavlov1-0/+5
2022-03-12Cleanup includes: DebugInfo & CodeGenserge-sans-paille1-1/+0
2022-01-25[LegalizeTypes][VP] Add splitting support for vp.gather and vp.scatterVictor Perez1-3/+7
2022-01-20[LegalizeTypes][VP] Add widening support for vp.gather and vp.scatterVictor Perez1-0/+2
2022-01-18[LegalizeTypes][VP] Add widening support for vp.reduce.*Victor Perez1-0/+18
2022-01-18[LegalizeTypes][VP] Add splitting support for vp.reduction.*Victor Perez1-0/+4
generated by cgit v1.1 at 2024-09-07 09:28:58 +0000