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path: root/llvm/lib/CodeGen/MachineSink.cpp
AgeCommit message (Expand)AuthorFilesLines
2024-09-25[MachineSink] Update register dependency correctly (#109763)Ruiling, Song1-2/+3
2024-08-29[ExtendLifetimes] Implement llvm.fake.use to extend variable lifetimes (#86149)Stephen Tozer1-1/+1
2024-08-22[CodeGen] Construct SmallVector with iterator ranges (NFC) (#105622)Kazu Hirata1-2/+1
2024-07-26[CodeGen] Remove AA parameter of isSafeToMove (#100691)Pengcheng Wang1-4/+4
2024-07-17[MachineSink][RISCV] Only call isConstantPhysReg or isIgnorableUse for uses. ...Craig Topper1-1/+1
2024-07-13[MachineSink] Check predecessor/successor relationship between two basic bloc...yozhu1-1/+1
2024-07-12[CodeGen][NewPM] Port `machine-block-freq` to new pass manager (#98317)paperchalice1-2/+4
2024-07-11Revert "[MachineSink] Only add sink candidate if ToBB is a successor of fromBB"YongKang Zhu1-1/+1
2024-07-11[MachineSink] Only add sink candidate if ToBB is a successor of fromBBYongKang Zhu1-1/+1
2024-07-09[MachineSink] Fix missing sinks along critical edges (#97618)Min-Yih Hsu1-15/+66
2024-07-09[CodeGen][NewPM] Port `machine-loops` to new pass manager (#97793)paperchalice1-1/+1
2024-06-28Reapply "[CodeGen][NewPM] Port machine-branch-prob to new pass manager" (#968...paperchalice1-3/+3
2024-06-27Revert "[CodeGen][NewPM] Port machine-branch-prob to new pass manager" (#96858)paperchalice1-3/+3
2024-06-27[CodeGen][NewPM] Port machine-branch-prob to new pass manager (#96389)paperchalice1-3/+3
2024-06-15[MachineSink] Use SmallDenseMap (NFC) (#95676)Kazu Hirata1-1/+1
2024-06-12[CodeGen][NewPM] Split `MachinePostDominators` into a concrete analysis resul...paperchalice1-2/+2
2024-06-11[CodeGen][NewPM] Split `MachineDominatorTree` into a concrete analysis result...paperchalice1-3/+3
2024-04-24[CodeGen] Make the parameter TRI required in some functions. (#85968)Xu Zhang1-1/+1
2024-02-15[CodeGen] Simplify updateLiveIn in MachineSink (#79831)Jay Foad1-7/+2
2023-12-13[MachineSink] Clear kill flags of sunk addressing mode registers (#75072)Momchil Velikov1-5/+16
2023-11-24 [MachineSink] Some more preserving of debug location when rematerialising an...Momchil Velikov1-1/+3
2023-11-21[MachineSink][AArch64] Preserve debug location when rematerialising an instru...Momchil Velikov1-3/+1
2023-11-11[MachineSink] Drop debug info for instructions deleted by sink-and-fold (#71443)Momchil Velikov1-19/+12
2023-10-12[MachineSink] Reduce the number of unnecessary invalidations of StoreInstrCac...Momchil Velikov1-2/+3
2023-10-12[MachineSink] Use LLVM ADTs (NFC) (#68677)Momchil Velikov1-10/+10
2023-10-06[MachineSink] Fix crash due to use-after-free in a MachineInstr* cache.Amara Emerson1-0/+2
2023-10-06AMDGPU: Fix temporal divergence introduced by machine-sink (#67456)Petar Avramovic1-0/+4
2023-10-06Revert "MachineSink: Fix sinking VGPR def out of a divergent loop"Petar Avramovic1-11/+4
2023-10-04[AArch64] Fix an incorrect handling of debug values in MachineSink (#68107)Momchil Velikov1-1/+4
2023-09-29[AArch64] Fix a compiler crash in MachineSink (#67705)Momchil Velikov1-17/+19
2023-09-25[MachineSink][AArch64] Sink instruction copies when they can replace copy int...Momchil Velikov1-29/+268
2023-08-14[CodeGen] Set regunitmasks for leaf regs to all instead of noneJay Foad1-3/+2
2023-08-09Remove a reference to rdar://problem/8030636Jon Roelofs1-1/+1
2023-08-02MachineSink: Fix strict weak ordering in GetAllSortedSuccessorsDanila Kutenin1-1/+1
2023-07-18MachineSink: Fix sinking VGPR def out of a divergent loopMatt Arsenault1-4/+11
2023-07-14MachineSink: Remove unnecessary empty block checkMatt Arsenault1-2/+0
2023-07-14MachineSink: Move helper function and use more constMatt Arsenault1-39/+41
2023-06-16[MC] Add MCRegisterInfo::regunits for iteration over register unitsSergei Barannikov1-5/+4
2023-06-01[CodeGen] Make use of MachineInstr::all_defs and all_uses. NFCI.Jay Foad1-18/+9
2023-05-16[MachineSink] Don't reject sinking because of dead def in isProfitableToSinkT...Jonas Paulsson1-6/+4
2023-04-18[MC] Use subregs/superregs instead of MCSubRegIterator/MCSuperRegIterator. NFC.Jay Foad1-2/+2
2023-04-17Fix uninitialized pointer members in CodeGenAkshay Khadse1-9/+9
2023-02-07[CodeGen] Define and use MachineOperand::getOperandNoJay Foad1-1/+1
2023-01-13[CodeGen] Remove uses of Register::isPhysicalRegister/isVirtualRegister. NFCCraig Topper1-9/+9
2023-01-06[DebugInfo][NFC] Add new MachineOperand type and change DBG_INSTR_REF syntaxStephen Tozer1-1/+1
2022-07-17[CodeGen] Qualify auto variables in for loops (NFC)Kazu Hirata1-1/+1
2022-06-24[MachineSink] Clear kill flags on operands outside loopCarl Ritson1-0/+6
2022-06-21[machinesink] fix debug invariance issueMarkus Lavin1-2/+2
2022-06-15[CodeGen] Fix the bug of machine sinkLuo, Yuanke1-0/+2
2022-05-26[MachineSink] replace MachineLoop with MachineCycleChen Zheng1-94/+96
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