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path: root/llvm/lib/CodeGen/BranchFolding.cpp
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2024-01-30Refactor recomputeLiveIns to converge on added MachineBasicBlocks (#79940)Oskar Wirga1-2/+4
2024-01-26Revert "Refactor recomputeLiveIns to operate on whole CFG (#79498)"Nikita Popov1-1/+2
2024-01-26Refactor recomputeLiveIns to operate on whole CFG (#79498)Oskar Wirga1-2/+1
2024-01-18[BranchFolding] Use isSuccessor to confirm fall through (#77923)Haohai Wen1-1/+1
2024-01-11[BranchFolding] Fix missing predecessors of landing-pad (#77608)HaohaiWen1-0/+17
2023-11-09[BranchFolding] Remove dubious assert from operator< (#71639)Nikita Popov1-6/+0
2023-06-01[CodeGen] Make use of MachineInstr::all_defs and all_uses. NFCI.Jay Foad1-4/+4
2023-04-27[BranchFolder] Skip redundant IMPLICIT_DEFs of subregsJay Foad1-0/+8
2023-04-18[MC] Use subregs/superregs instead of MCSubRegIterator/MCSuperRegIterator. NFC.Jay Foad1-2/+2
2023-03-29Reland "[Windows SEH]: HARDWARE EXCEPTION HANDLING (MSVC -EHa) - Part 2"Phoebe Wang1-1/+1
2023-02-06Recommit "Improve and enable folding of conditional branches with tail calls....Noah Goldstein1-32/+33
2023-02-01Revert "Improve and enable folding of conditional branches with tail calls."Mikhail Goncharov1-29/+32
2023-02-01Improve and enable folding of conditional branches with tail calls.Noah Goldstein1-32/+29
2023-01-13[CodeGen] Remove uses of Register::isPhysicalRegister/isVirtualRegister. NFCCraig Topper1-1/+1
2022-12-02Revert "[Windows SEH]: HARDWARE EXCEPTION HANDLING (MSVC -EHa) - Part 2"tentzen1-1/+1
2022-12-01[Windows SEH]: HARDWARE EXCEPTION HANDLING (MSVC -EHa) - Part 2tentzen1-1/+1
2022-06-01BranchFolder: Require NoPHIsMatt Arsenault1-0/+5
2022-04-27Revert "BranchFolder: Assert on SSA functions"Matt Arsenault1-2/+0
2022-04-27BranchFolder: Assert on SSA functionsMatt Arsenault1-0/+2
2022-03-16Cleanup codegen includesserge-sans-paille1-2/+1
2022-03-10Revert "Cleanup codegen includes"Nico Weber1-1/+2
2022-03-10Cleanup codegen includesserge-sans-paille1-2/+1
2021-12-03[CodeGen] Use range-based for loops (NFC)Kazu Hirata1-2/+2
2021-11-28[llvm] Use range-based for loops (NFC)Kazu Hirata1-2/+2
2021-09-18[CodeGen] Use make_early_inc_range (NFC)Kazu Hirata1-4/+2
2021-09-16[llvm] Use drop_begin (NFC)Kazu Hirata1-6/+5
2021-09-10[CodeGen, Target] Use pred_empty and succ_empty (NFC)Kazu Hirata1-1/+1
2021-06-18[CSSPGO] Undoing the concept of dangling pseudo probeHongtao Yu1-10/+0
2021-04-19[CSSPGO] Flip SkipPseudoOp to true for MIR APIs.Hongtao Yu1-5/+5
2021-03-03[CSSPGO] Unblocking optimizations by dangling pseudo probes.Hongtao Yu1-1/+11
2021-02-11[CodeGen] Use range-based for loops (NFC)Kazu Hirata1-2/+2
2021-01-16[llvm] Use *::empty (NFC)Kazu Hirata1-1/+1
2020-09-19Fix some clang-tidy bugprone-argument-comment issuesFangrui Song1-4/+5
2020-08-13BranchFolding.cpp - removes includes already included by BranchFolding.h. NFC.Simon Pilgrim1-5/+0
2020-07-01Change the INLINEASM_BR MachineInstr to be a non-terminating instruction.James Y Knight1-18/+24
2020-07-01[NFC] Clean up uses of MachineModuleInfoWrapperPassYuanfang Chen1-6/+2
2020-06-30BranchFolding: Use RegisterMatt Arsenault1-9/+9
2020-05-29Add NoMerge MIFlag to avoid MIR branch foldingZequan Wu1-0/+3
2020-05-21Don't jump to landing pads in Control Flow OptimizerArthur Eubanks1-8/+10
2020-05-07Correctly modify the CFG in IfConverter, and then remove theJames Y Knight1-21/+8
2020-04-22[MachineBasicBlock] Add helpers for skipping debug instructions [1/14]Vedant Kumar1-2/+1
2020-04-20BranchFolding.h - cleanup includes and forward declarations. NFC.Simon Pilgrim1-0/+1
2020-02-27[CallSiteInfo] Handle bundles when updating call site infoDjordje Todorovic1-1/+1
2020-02-10[CSInfo] Use isCandidateForCallSiteEntry() when updating the CSInfoDjordje Todorovic1-1/+1
2020-01-31[PGO][PGSO] Handle MBFIWrapperHiroshi Yamauchi1-3/+3
2020-01-28[MBFI] Move BranchFolding::MBFIWrapper to its own files. NFC.Hiroshi Yamauchi1-38/+2
2020-01-21Update spelling of {analyze,insert,remove}Branch in strings and commentsKrzysztof Parzyszek1-1/+1
2019-12-19Make more use of MachineInstr::mayLoadOrStore.Jay Foad1-2/+2
2019-12-09[PGO][PGSO] Instrument the code gen / target passes.Hiroshi Yamauchi1-7/+20
2019-12-06Revert "[PGO][PGSO] Instrument the code gen / target passes."Hiroshi Yamauchi1-20/+7
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