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This reverts the following commits:
- a539a090009378ecfcfbfaaa280eeac8f5b9d695
- 31316b3f8511d659cc14ebc72fb2b226f78478a9
Rationale for revert:
https://github.com/llvm/llvm-project/issues/74258#issuecomment-1847836861
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https://github.com/llvm/llvm-project/pull/74764 reported that the
`lljit-with-remote-debugging` test fails on AArch64 hosts, because the
input IR file states arch x86_64 explicitly. In order to drop the target
triple we have to remove a check in the example implementation.
Not sure it's fully portable now, but at least it's better than before.
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legalize-vastart-rv64.mir to fix buildbot failure. NFC
I must have messed something up when addressing feedback on the patch
that added these tests.
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https://github.com/llvm/llvm-project/pull/74676 landed the work to
implement `-fdefine-target-os-macros` and enabled the extension for the
Darwin driver. However it is breaking some test builds. Leave the
extension disabled for now until we can fix/workaround the build
failures.
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Note, tensor.empty may feed into SPARSE output (meaning it truly has no
values yet), but for a DENSE output, it should always have an initial
value. We ran a verifier over all our tests and this is the only
remaining omission.
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On AIX, the __ehinfo toc-entry is never referenced directly using
instructions, therefore we can allocate them with the TE storage mapping
class to move them to the end of TOC.
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The `< %s` needed to be removed. This change fixes the test introduced
in 02379d19147afda413a2bc757e8d2f5249d772d1
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For BSR and convolutions, we encounter
(d0, d1, d2, d3) -> ((d0 + d2) floordiv 2, (d1 + d3) floordiv 2, (d0 +
d2) mod 2, (d1 + d3) mod 2)
which crashed the current test. Note that an actual test and working
code is still to follow (since we need to fix a few other things first)
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Examle:
substitute
mesh.cluster @mesh0(rank = 2, dim_sizes = [0, 4])
with
mesh.cluster @mesh0(rank = 2, dim_sizes = ?x4)
Same as tensor/memref shapes. The only difference is for 0-rank shapes.
With tensors you would have something like `tensor<f32>`. Here to avoid
matching an empty string a 0-rank shape is denoted by `[]`.
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This test is added to be the counterpart of the SelectionDAG
llvm/test/CodeGen/RISCV/vararg.ll test. Minor changes were made compared
to the other version, all which are commented in the test file added in
this commit.
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This patch moves PassExecutionAction to Pass.h so that it can be used by
the action framework to introspect and intercede in pass managers that
might be set up opaquely. This provides for a very particular use case,
which essentially involves being able to intercede in a PassManager and
skip or apply individual passes. Because of this, this patch also adds a
test for this use case to verify that it could in fact work.
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This removes some assumptions that the small code model will only
reference "near" globals.
There are still some missing optimizations and wrong code sequences, but
I'd like to address those separately. This will require auditing any
checks of the code model in the X86 backend.
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legalizeVAStart. (#73989)
We need to store the frame index to the location pointed to by the
VASTART, not the other way around.
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In the future, we can consider adding a G_VACOPY opcode instead of going
through the GIntrinsic for all targets. We do the approach in this patch
because that is what other targets do today.
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Add LL parsing for `<N x ty> splat(ty <imm>)` that lowers onto
ConstantInt::get() for integer types and ConstantFP::get() for
floating-point types.
The intent is to extend ConstantInt/FP classes to support vector types
rather than redirecting to other constant classes as the get() methods
do today.
This patch gives IR writers the convenience of using the shorthand
today, thus allowing existing tests to be ported.
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(#74557)
When a tool defines only one or two subcommands, the `[subcommand]` part
is not displayed in the `USAGE` help line. Note that a similar issue
for printing the list of the subcommands has been fixed in
https://reviews.llvm.org/D25463.
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This patch starts initial modeling of VF * UF in VPlan.
Initially, introduce a dedicated VFxUF VPValue, which is then
populated during VPlan::prepareToExecute. Initially, the VF * UF
applies only to the main vector loop region. Once we extend the
scope of VPlan in the future, we may want to associate different VFxUFs
with different vector loop regions (e.g. the epilogue vector loop)
This allows explicitly parameterizing recipes that rely on the
VF * UF, like the canonical induction increment. At the moment, this
mainly helps to avoid generating some duplicated calls to vscale with
scalable vectors. It should also allow using EVL as induction increments
explicitly in D99750. Referring to VF * UF is also needed in other
places that we plan to migrate to VPlan, like the minimum trip count
check during skeleton creation.
The first version creates the value for VF * UF directly in
prepareToExecute to limit the scope of the patch. A follow-on patch will
model VF * UF computation explicitly in VPlan using recipes.
Moved from Phabricator (https://reviews.llvm.org/D157322)
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This fixes the macro syntax
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Extends the lifetime of the map `ConstructedObjects` to be of the
whole CFG so that the map can connect temporary Ctor and Dtor in
different CFG blocks.
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G_VAARG can be expanded similiar to SelectionDAG::expandVAArg through
LegalizerHelper::lower. This patch implements the lowering through this
style of expansion.
The expansion gets the head of the va_list by loading the pointer to
va_list. Then, the head of the list is adjusted depending on argument
alignment information. This gives a pointer to the element to be read
out of the va_list. Next, the head of the va_list is bumped to the next
element in the list. The new head of the list is stored back to the
original pointer to the head of the va_list so that subsequent G_VAARG
instructions get the next element in the list. Lastly, the element is
loaded from the alignment adjusted pointer constructed earlier.
This change is stacked on #73062.
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We'd like to make various instrprof globals large to make them not
contribute to relocation pressure since there are no direct accesses
to them in the module.
Similar to what was done for asan_globals in #74514.
This affects the __llvm_prf_vals, __llvm_prf_vnds, and __llvm_prf_names
sections.
The reland fixes platform.ll.
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This reverts commit 5507f70cc205a7ec21d264a64c703b3d314b998c.
Breaks bots, e.g. https://lab.llvm.org/buildbot/#/builders/232/builds/16374
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if we are going use copy elision
ResolveConstructorOverload needs to check properly if we are going to use copy
elision we can't use a conversion function.
This fixes:
https://github.com/llvm/llvm-project/issues/39319
https://github.com/llvm/llvm-project/issues/60182
https://github.com/llvm/llvm-project/issues/62157
https://github.com/llvm/llvm-project/issues/64885
https://github.com/llvm/llvm-project/issues/65568
Differential Revision: https://reviews.llvm.org/D148474
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We'd like to make various instrprof globals large to make them not
contribute to relocation pressure since there are no direct accesses
to them in the module.
Similar to what was done for asan_globals in #74514.
This affects the __llvm_prf_vals, __llvm_prf_vnds, and __llvm_prf_names
sections.
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If the 'directive name' is a special token instead of an identifier, we
end up asserting. This fixes that.
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This should make it easier to get better output when wchar_t tests fail.
The code is based on the Unicode transcoding in `<format>`.
Differential Revision: https://reviews.llvm.org/D150593
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(#74787)
…arse conv.
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Fix forward for #74862
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Required for torch-mlir.
Cf. llvm/torch-mlir#2604 "Implement torch.aten.acos".
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Use %t in output file name as %T is non-unique.
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Fix #74258
This is a reland of #74837, the error went unnoticed because it compiles
fine on
clang-16 but not on clang-12 which is the version used on the buildbots.
The fix was to explicitly initialize `BigInt` variables in `constexpr`
operations: `BigInt<Bits, Signed> result(0);` instead of `BigInt<Bits,
Signed> result;`
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Add builtin: 'svreinterpret_b' to cast from svcount_t to svbool_t.
Add builtin: 'svreinterpret_c' to cast from svbool_t to svcount_t.
Patch by: Hassnaa Hamdi <hassnaa.hamdi@arm.com>
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calls. NFC.
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Let the AtomicExpand pass do more of the job of expanding
AtomicRMWInst:s in order to simplify the handling in the backend.
The only cases that the backend needs to handle itself are those of
subword size (8/16 bits) and those directly corresponding to a target
instruction.
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This code should only be run for intrinsics known to LLVM (otherwise
it will crash), not for everything that starts with "llvm.".
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Reverts llvm/llvm-project#74837
Some build bot are failing because of missing constexpr.
https://lab.llvm.org/buildbot/#/builders/138/builds/56468/steps/7/logs/stdio
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Fix #74258
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The returned attribute can be used when it is possible to
"losslessly bitcast" between the argument and return type,
including between two vector types.
computeKnownBits() would crash in this case, isKnownNonZero()
would potentially produce a miscompile.
Fixes https://github.com/llvm/llvm-project/issues/74722.
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This patch fixes:
clang/lib/Analysis/FlowSensitive/HTMLLogger.cpp:376:22: error:
comparison of integers of different signs: 'unsigned int' and
'TokenInfo::(unnamed enum at
clang/lib/Analysis/FlowSensitive/HTMLLogger.cpp:356:7)'
[-Werror,-Wsign-compare]
clang/lib/Analysis/FlowSensitive/HTMLLogger.cpp:385:23: error:
comparison of integers of different signs: 'unsigned int' and
'TokenInfo::(unnamed enum at
clang/lib/Analysis/FlowSensitive/HTMLLogger.cpp:356:7)'
[-Werror,-Wsign-compare]
etc
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With opaque pointers, the address spaces will only be the same if
the types are the same, in which case this would have been handled
at the start of the method already.
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On platforms where char is signed, the ">> 4" shift will produce
incorrect results. We were already working on unsigned char for
most characters, but not for the first one.
Fixes https://github.com/llvm/llvm-project/issues/74732.
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(#74594)
…vset
According to the PR#257[1]
[1]ARM-software/acle#257
Co-authored by: Matthew Devereau <matthew.devereau@arm.com>
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Cortex-M52 is an Armv8.1 AArch32 CPU.
Technical specifications available at:
https://developer.arm.com/processors/cortex-m52
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