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2024-06-19[libc] Fix scheduler test incorrectly guessing user privileges (#95562)OverMighty1-21/+27
Non-root users may be able to set real-time scheduling policies. Don't expect failure to set real-time scheduling policies based on UID. Instead, check that if it fails, it is either due to missing privileges, or unsupported parameters if the scheduling policy is not mandated by POSIX. Fixes #95564.
2024-06-19[JITLink] Use MapVector to stabilize iteration orderFangrui Song1-2/+3
Otherwise LinkGraph::dump output could change (llvm/test/ExecutionEngine/JITLink/x86-64/COFF_pdata_strip.s) when llvm::hash_value(StringRef) changes.
2024-06-19[clang-format] Correctly annotate l_brace after TypenameMacro (#96026)Owen Pan3-3/+24
Closes #95418.
2024-06-19[JITLink] Ensure Edges order is deterministicFangrui Song1-1/+2
2024-06-19[TableGen,GlobalISel] Use MapVector to stabilize iteration orderFangrui Song1-1/+1
Otherwise llvm/test/TableGen/GlobalISelCombinerEmitter/type-inference.td could fail when llvm::hash_value(StringRef) changes. Fix #66377
2024-06-19[flang] fixing alloca hoisting for blocks having single op. (#96009)Vijay Kandiah3-7/+10
This change fixes the issue https://github.com/llvm/llvm-project/issues/95977 due to commit c0cba5198155dba246ddd5764f57595d9bbbddef inserting allocas after the terminator op in the insertion block in the case where the block had only a single operation, its terminator, in it. With this change, the hoisted constant-sized allocas are placed at the front of the insertion block, rather than right after the first operation in it.
2024-06-19[Attributor] Stabilize llvm.assume outputFangrui Song3-19/+24
Don't rely on the iteration order of DenseSet<StringRef>, which is not guaranteed to be deterministic.
2024-06-19[CompilerRT] Add support for numerical sanitizer (#94322)Alexander Shaposhnikov23-1/+2390
This diff contains the compiler-rt changes / preparations for nsan. Test plan: 1. cd build/runtimes/runtimes-bins && ninja check-nsan 2. ninja check-all
2024-06-19[LowerTypeTests] Use MapVector to stabilize iteration orderFangrui Song2-6/+6
Otherwise llvm/test/LTO/X86/cfi_jt_aliases.ll could fail when DenseMapInfo<StringRef> changes.
2024-06-19[llvm-cov] let text mode divider honor --show-branch-summary, ↵Wentao Zhang1-6/+23
--show-region-summary etc (#96016)
2024-06-19[PowerPC] Remove extraneous ArrayRef (NFC) (#96092)Kazu Hirata1-6/+6
ArrayRef can be implicitly constructed from a C array while inferring its size.
2024-06-19[flang][cuda] Do not consider PINNED as device attribute (#95988)Valentin Clement (バレンタイン クレメン)4-14/+45
PINNED is a CUDA data attribute meant for the host variables. Do not consider it when computing the number of device variables in assignment for the cuda data transfer.
2024-06-19[Support] Add llvm::xxh3_128bits (#95863)Brendan Duke3-35/+623
Add a 128-bit xxhash function, following the existing `llvm::xxh3_64bits` and `llvm::xxHash` implementations. Previously, 48e93f57f1ee914ca29aa31bf2ccd916565a3610 added support for `llvm::xxh3_64bits`, which closely follows the upstream implementation at https://github.com/Cyan4973/xxHash, with simplifications from Devin Hussey's xxhash-clean. However, it is desirable to have a larger 128-bit hash key for use cases such as filesystem checksums where chance of collision needs to be negligible. So to that end this also ports over the 128-bit xxh3_128bits as `llvm::xxh3_128bits`. Testing: - Add a test based on xsum_sanity_check.c in upstream xxhash.
2024-06-19[VPlan] Introduce isHeaderMask helper (NFCI).Florian Hahn4-4/+65
Split off from https://github.com/llvm/llvm-project/pull/92555 and slightly generalized to more precisely check for a header mask. Use it to replace manual checks in collectHeaderMasks.
2024-06-19[DirectX] Add trig intrinsics and link them with DXIL backend (#95968)Farzon Lotfi15-0/+427
This change is part of this proposal: https://discourse.llvm.org/t/rfc-all-the-math-intrinsics/78294 This is part 1 of 4 PRs. It sets the ground work for adding the intrinsics. Add DXIL Lower for `acos`, `asin`, `atan`, `cosh`, `sinh`, and `tanh` https://github.com/llvm/llvm-project/issues/70079 https://github.com/llvm/llvm-project/issues/70080 https://github.com/llvm/llvm-project/issues/70081 https://github.com/llvm/llvm-project/issues/70083 https://github.com/llvm/llvm-project/issues/70084 https://github.com/llvm/llvm-project/issues/95966
2024-06-19[ADT] Fix incorrect const parent ptr type in ilist (#96059)Stephen Tozer8-49/+68
Fixes issue reported in: https://github.com/llvm/llvm-project/pull/94224 The recent commit above added an ilist_parent<ParentTy> option, which added a parent pointer to the ilist_node_base type for the list. The const methods for returning that parent pointer however were incorrectly implemented, returning `const ParentPtrTy`, which is equivalent to `ParentTy * const` rather than `const ParentTy *`. This patch fixes this by passing around `ParentTy` in ilist's internal logic rather than `ParentPtrTy`, removing the ability to have a `void*` parent pointer but cleanly fixing this error.
2024-06-19[libc++] Fix triviality of std::pair for trivially copyable types without an ↵Louis Dionne6-4/+106
assignment operator (#95444) Since 83ead2b, std::pair would not be trivially copyable when it holds a trivially copyable type without an assignment operator. That is because pair gained an elligible copy-assignment-operator (the const version) in 83ead2b in C++ >= 23. This means that the trivially copyable property of std::pair for such types would be inconsistent between C++11/14/17/20 (trivially copyable) and C++23/26 (not trivially copyable). This patch makes std::pair's behavior consistent in all Standard modes EXCEPT C++03, which is a pre-existing condition and we have no way of changing (also, it shouldn't matter because the std::is_trivially_copyable trait was introduced in C++11). While this is not technically an ABI break, in practice we do know that folks sometimes use a different representation based on whether a type is trivially copyable. So we're treating 83ead2b as an ABI break and this patch is fixing said breakage. This patch also adds tests stolen from #89652 that pin down the ABI of std::pair with respect to being trivially copyable. Fixes #95428
2024-06-19[clang-linker-wrapper] Use MapVector to stabilize iteration orderFangrui Song1-2/+2
2024-06-19[DirectX][DXIL] Update DXIL Op TableGen Specification (#95807)S. Bharadwaj Yadavalli1-92/+219
Add a mechanism to specify constraints to the design document. These facilitate specification of DXIL Op attributes that are predicated by Shader Model version.
2024-06-19Reimplementing target description concept using DLTI attribute (#92138)Niranjan Hasabnis16-215/+964
and Interfaces. This is a newer implementation of PR https://github.com/llvm/llvm-project/pull/85141 and [RFC](https://discourse.llvm.org/t/rfc-target-description-and-cost-model-in-mlir/76990) by considering reviews and comments on the original PR. As an example of attributes supported by this commit: ``` module attributes { dlti.target_system_spec = #dlti.target_device_spec< #dlti.dl_entry<"dlti.device_id", 0: ui32>, #dlti.dl_entry<"dlti.device_type", "CPU">, #dlti.dl_entry<"dlti.L1_cache_size_in_bytes", 8192 : ui32>>, #dlti.target_device_spec < #dlti.dl_entry<"dlti.device_id", 1: ui32>, #dlti.dl_entry<"dlti.device_type", "GPU">, #dlti.dl_entry<"dlti.max_vector_op_width", 64 : ui32>>, #dlti.target_device_spec < #dlti.dl_entry<"dlti.device_id", 2: ui32>, #dlti.dl_entry<"dlti.device_type", "XPU">>> } ```
2024-06-19[RLEV] Add coverage for expansion of umin EVL idiomPhilip Reames1-1/+104
2024-06-19[clang-linker-wrapper] Use MapVector to stabilize iteration orderFangrui Song3-13/+14
DenseMap iteration order is not guaranteed to be deterministic. Without the change, clang/test/Driver/linker-wrapper{,-libs}.c would fail when `combineHashValue` changes (#95970).
2024-06-19[DenseMap] Update combineHashValueFangrui Song1-11/+13
`combineHashValue` is a custom bit mixer from 2008 (5fc8ab6d187aefbf1d2cbd36e191e675b14db8f6) used for std::pair and std::tuple. It has a long dependency chain and slow. Replace it with a simply multiply-xorshift style hash using a constant from splitmix64[1]. abseil-cpp and carbon also use this style, but with uint128 to probably get a lower avalanche bias. We don't use uint128 for MSVC portability. Measured time to compute [0,1000000000) values on an i7-11850H: * old: 1.163s * new: 0.427s [1]: https://jonkagstrom.com/tuning-bit-mixers/index.html Pull Request: https://github.com/llvm/llvm-project/pull/95970
2024-06-19[GlobalMerge] Use MapVector to stabilize iteration orderFangrui Song2-11/+12
DenseMap iteration order is not guaranteed to be deterministic. Without the change, llvm/test/Transforms/GlobalMerge/basic.ll could fail when `combineHashValue` changes (#95970).
2024-06-19[clang-doc] Add basic e2e test (#93928)PeterChou110-2/+568
Adds e2e tests for clang-doc, which serves as useful test against regression in the html output. It also serves as a helpful tool for code review as we can see the diffs to clang-docs output Closes https://github.com/llvm/llvm-project/issues/93925
2024-06-19[gn/mac] Fix isysroot flag when building compiler-rtNico Weber1-1/+1
If the GN arg `sysroot` was set to a root-relative path like e.g. `"//sysroot"`, we weren't rebasing it correctly, leading to warnings from clang about it ignoring a non-existent sysroot. Similar to 6073f87d7f160.
2024-06-19[CodeGen] Remove extraneous ArrayRef (NFC) (#96085)Kazu Hirata1-2/+1
A C array can be implicitly cast to ArrayRef.
2024-06-19[clang][Interp][NFC] Loosen an assertionTimm Bäder1-1/+3
2024-06-19[clang][Interp][NFC] Fix initializing union APValuesTimm Bäder1-1/+1
The InitElem op assumes an array.
2024-06-19[InstCombine] Swap out range metadata to range attribute for ↵Andreas Jonson2-19/+56
arm_mve_pred_v2i (#94847)
2024-06-19[LV] Consider insts feeding interleave group pointers free.Florian Hahn3-26/+34
For interleave groups, we only generate a pointer for the start of the interleave group (the instruction at the insert position). The other addresses for other members are alreayd considered free, but so are their operands, if they are only used in address computations for other interleave group members.
2024-06-19[SCEV] Use context sensitive reasoning in howFarToZero (#94525)Philip Reames3-32/+39
This change builds on 0a357ad which supported non-constant strides in howFarToZero, but used only context insensitive reasoning. This change does two things: 1) Directly use context sensitive queries to prove facts established before the loop. Note that we technically only need facts known at the latch, but using facts known on entry is a conservative approximation which will cover most everything. 2) For the non-zero check, we can usually prove non-zero from the finite assumption implied by mustprogress. This eliminates the need to do the context sensitive query in the common case.
2024-06-19[Interp] Record::getBase - merge isRecordType/getAs<RecordType>() checks. NFC.Simon Pilgrim1-5/+5
Noticed because static analyzer doesn't understand that isRecordType is just a wrapper to isa<> and was warning about a potential null dereference
2024-06-19[PowerPC] Regenerate p8altivec-shuffles-pred.ll with update_llc_test_checks ↵Simon Pilgrim1-9/+10
script
2024-06-19[X86] Regenerate vector-truncate-combine.ll to check entire code sequenceSimon Pilgrim1-5/+9
2024-06-19[SCEVExpander] Recognize urem idiom during expansion (#96005)Philip Reames4-9/+16
If we have a urem expression, emitting it as a urem is significantly better that letting the fully expansion kick in. We have the risk of a udiv or mul which could have previously been shared, but loosing that seems like a reasonable tradeoff for being able to round trip a urem w/o modification.
2024-06-19[Clang][AArch64] Use 'uint64_t*' for _arm_get_sme_state builtin. (#95982)Sander de Smalen2-1/+15
Depending on the platform, the parameter for __arm_get_sme_state requires a `unsigned long long*` instead of a `unsigned long*`. From ASTContext.cpp: case 'W': // This modifier represents int64 type.
2024-06-19[Clang] Swap range and noundef metadata to attribute for intrinsics. (#94851)Andreas Jonson3-18/+13
2024-06-19[libc++] Install Python packaging to resolve LLDB data formatter issues (#95971)Louis Dionne1-0/+1
This should fix the failures that started happening after #93712 landed.
2024-06-19[AVR] Let ArrayRef infer the array size (NFC) (#96076)Kazu Hirata1-4/+4
2024-06-19[Sema] Use llvm::erase_if (NFC) (#96068)Kazu Hirata1-16/+8
While I am at it, I'm constructing SmallVector directly from ArrayRef.
2024-06-19AMDGPU/gfx12: Minor documentation update (#96079)Nicolai Hähnle1-7/+7
2024-06-19[NFC][SPARC] Fix typos and style mismatchesKoakuma3-7/+7
Fix style errors accidentally introduced in PRs #87259 and #94245. Reviewers: rorth, jrtc27, brad0, s-barannikov Reviewed By: s-barannikov Pull Request: https://github.com/llvm/llvm-project/pull/96019
2024-06-19[LV] Add more masked store cost tests with different masks.Florian Hahn1-0/+151
Add additional masked store tests which caused crashes with earlier versions of https://github.com/llvm/llvm-project/pull/92555.
2024-06-19[GISel][RISCV]Implement indirect parameter passing (#95429)Gábor Spaits4-32/+898
Some targets like RISC-V pass scalars wider than 2×XLEN bits by reference, so those arguments are replaced in the argument list with an address (See RISC-V ABIs Specification 1.0 section 2.1). This commit implements this indirect parameter passing in GlobalISel. --------- Co-authored-by: Gabor Spaits <Gabor.Spaits@hightec-rt.com>
2024-06-19[mlir][Conversion] Generalize and fix crash in `reconcile-unrealized-casts` ↵Matthias Springer7-159/+180
(#95700) This commit fixes a crash in `-reconcile-unrealized-casts` when cast ops have multiple operands: ``` DialectConversion.cpp:1583: virtual void mlir::ConversionPatternRewriter::replaceOp(mlir::Operation *, mlir::ValueRange): Assertion `op->getNumResults() == newValues.size() && "incorrect # of replacement values"' failed. ``` This commit also generalizes the pass such that more ops are folded. In particular (letters indicate types): ``` A / \ B C | A ``` Previously, such IR was not folded at all. The `A -> B -> A` type cast cycle is now folded away. (The `A -> C` cast stays in place.) This commit also turns the pass from a dialect conversion into a simple IR walk. The pattern and its `populate` function are removed. The pattern was a (non-conversion) rewrite pattern, but used in a dialect conversion, which is generally not safe. In particular, the rewrite pattern may traverse IR that was already scheduled for erasure by the dialect conversion. Note: Some test cases changed slightly (NFC) because the new pass implementation no longer attempts to fold ops. Note for LLVM integration: If your pipeline uses the removed `populate` function, try to simply remove that function call. Chances are you may not need it at all. If it is in fact needed, run the `-reconcile-unrealized-casts` pass right after the pass that used to populate the pattern. --------- Co-authored-by: Maksim Levental <maksim.levental@gmail.com> Co-authored-by: Markus Böck <markus.boeck02@gmail.com>
2024-06-19[mlir][side effect] refactor(*): Include more precise side effects (#94213)donald chen40-397/+687
This patch adds more precise side effects to the current ops with memory effects, allowing us to determine which OpOperand/OpResult/BlockArgument the operation reads or writes, rather than just recording the reading and writing of values. This allows for convenient use of precise side effects to achieve analysis and optimization. Related discussions: https://discourse.llvm.org/t/rfc-add-operandindex-to-sideeffect-instance/79243
2024-06-19[AMDGPU] Add IsSingle to a few Interp instructions (#95984)Joe Nash1-1/+1
A _e64 suffix should not be printed since these instructions only have one legal encoding length. The absence of the IsSingle flag is hidden by how the string is printed. We could fix it for GFX10 as well, but we shouldn't change the asm output to omit _e64 at this point. NFC.
2024-06-19[AMDGPU] Add IsSingle to V_DIV_FMAS* for consistency. (#95983)Joe Nash1-0/+2
A _e64 suffix should not be printed since these instructions only have one legal encoding length. The absence of the IsSingle flag is hidden by how the string is printed, but fix it for consistency. NFC
2024-06-19[RISCV][test] Pre-commit test case where ConstantHoisting fails to triggerAlex Bradbury1-0/+12
Our getIntImmCostInst is falling back to returning TCC_Free in this case even though both immediates take two instructions to materialise.