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2019-07-09Merging r360861, with an additional change to also add the PPC64_OPD1llvmorg-8.0.1-rc4llvmorg-8.0.1Dimitry Andric3-2/+48
and PPC64_OPD2 lines to the DEFINE_LIBUNWIND_PRIVATE_FUNCTION() macro, which was removed in r357640: ------------------------------------------------------------------------ r360861 | mstorsjo | 2019-05-15 23:49:13 -0700 (Wed, 15 May 2019) | 13 lines [PPC64][libunwind] Fix r2 not properly restored This change makes each unwind step inspect the instruction at the return address and, if needed, read r2 from its saved location and modify the context appropriately. The unwind logic is able to handle both ELFv1 and ELFv2 stacks. Reported by Bug 41050 Patch by Leandro Lupori! Differential Revision: https://reviews.llvm.org/D59694 ------------------------------------------------------------------------ llvm-svn: 365542
2019-07-09Revert merge of r360861:Dimitry Andric3-45/+1
------------------------------------------------------------------------ r360861 | mstorsjo | 2019-05-15 23:49:13 -0700 (Wed, 15 May 2019) | 13 lines [PPC64][libunwind] Fix r2 not properly restored This change makes each unwind step inspect the instruction at the return address and, if needed, read r2 from its saved location and modify the context appropriately. The unwind logic is able to handle both ELFv1 and ELFv2 stacks. Reported by Bug 41050 Patch by Leandro Lupori! Differential Revision: https://reviews.llvm.org/D59694 ------------------------------------------------------------------------ llvm-svn: 365539
2019-06-26Merging r354633:llvmorg-8.0.1-rc3Tom Stellard2-7/+12
------------------------------------------------------------------------ r354633 | rsmith | 2019-02-21 15:04:35 -0800 (Thu, 21 Feb 2019) | 3 lines Use _Q as MS ABI mangling for char8_t. Thanks to Yuriy Solodkyy for letting us know the mangling here. ------------------------------------------------------------------------ llvm-svn: 364487
2019-06-26Merging r359809:Reid Kleckner3-23/+32
------------------------------------------------------------------------ r359809 | rnk | 2019-05-02 10:45:54 -0700 (Thu, 02 May 2019) | 27 lines Use primary template parameter names for variable template debug info Summary: Fixes PR41677 Consider: template <typename LHS, typename RHS> constexpr bool is_same_v = false; template <typename T> constexpr bool is_same_v<T, T> = true; template constexpr bool is_same_v<int, int>; Before this change, when emitting debug info for the `is_same_v<int, int>` global variable, clang would crash because it would try to use the template parameter list from the partial specialization to give parameter names to template arguments. This doesn't work in general, since a partial specialization can have fewer arguments than the primary template. Therefore, always use the primary template. Hypothetically we could try to use the parameter names from the partial specialization when possible, but it's not clear this really helps debugging in practice. Reviewers: JDevlieghere, aprantl, ormris, dblaikie Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D61408 ------------------------------------------------------------------------ llvm-svn: 364483
2019-06-25Merging r355033:Tom Stellard2-1/+6
------------------------------------------------------------------------ r355033 | joerg | 2019-02-27 13:46:01 -0800 (Wed, 27 Feb 2019) | 2 lines Use Secure PLT as default on NetBSD/PowerPC. ------------------------------------------------------------------------ llvm-svn: 364258
2019-06-25Merging r361114:Tom Stellard2-1/+5
------------------------------------------------------------------------ r361114 | mgorny | 2019-05-18 23:05:31 -0700 (Sat, 18 May 2019) | 3 lines [lldb] [lit] Driver/TestConvenienceVariables.test requires Python Differential Revision: https://reviews.llvm.org/D62096 ------------------------------------------------------------------------ llvm-svn: 364257
2019-06-24Merging r360861:Tom Stellard3-1/+45
------------------------------------------------------------------------ r360861 | mstorsjo | 2019-05-15 23:49:13 -0700 (Wed, 15 May 2019) | 13 lines [PPC64][libunwind] Fix r2 not properly restored This change makes each unwind step inspect the instruction at the return address and, if needed, read r2 from its saved location and modify the context appropriately. The unwind logic is able to handle both ELFv1 and ELFv2 stacks. Reported by Bug 41050 Patch by Leandro Lupori! Differential Revision: https://reviews.llvm.org/D59694 ------------------------------------------------------------------------ llvm-svn: 364217
2019-06-24Merging r359094:Tom Stellard2-1/+34
------------------------------------------------------------------------ r359094 | maskray | 2019-04-24 07:03:30 -0700 (Wed, 24 Apr 2019) | 12 lines [PPC64] Consider localentry offset when computing branch distance Summary: We don't take localentry offset into account, and thus may fail to create a long branch when the gap is just a few bytes smaller than 2^25. relocation R_PPC64_REL24 out of range: 33554432 is not in [-33554432, 33554431] relocation R_PPC64_REL24 out of range: 33554436 is not in [-33554432, 33554431] Fix that by adding the offset to the symbol VA. Differential Revision: https://reviews.llvm.org/D61058 ------------------------------------------------------------------------ llvm-svn: 364209
2019-06-17Merging r361158:Tom Stellard5-67/+76
------------------------------------------------------------------------ r361158 | jprotze | 2019-05-20 07:21:42 -0700 (Mon, 20 May 2019) | 11 lines [OpenMP][OMPT] Fix locking testcases for 32 bit architectures https://reviews.llvm.org/D58454 did not fix the problem for a typical use case of building LLVM with gcc or icc and then testing with the newly built clang compiler. The compilers do not agree on how to extend a 32-bit pointer to uint64, so make the pointer unsigned first, before adjusting the size. Patch by Joachim Protze Differential Revision: https://reviews.llvm.org/D58506 ------------------------------------------------------------------------ llvm-svn: 363628
2019-06-11Merging r360862:llvmorg-8.0.1-rc2Tom Stellard3-256/+254
------------------------------------------------------------------------ r360862 | mstorsjo | 2019-05-15 23:49:20 -0700 (Wed, 15 May 2019) | 12 lines [PPC] Fix 32-bit build of libunwind Clang integrated assembler was unable to build libunwind PPC32 assembly code, present in functions used to save/restore register context. This change consists in replacing the assembly style used in libunwind source, to one that is compatible with both Clang integrated assembler as well as GNU assembler. Patch by Leandro Lupori! Differential Revision: https://reviews.llvm.org/D61792 ------------------------------------------------------------------------ llvm-svn: 363030
2019-06-11Add release note for DIBuilder API changesTom Stellard1-0/+20
llvm-svn: 363027
2019-06-10Merging r358042:Tom Stellard2-2/+25
------------------------------------------------------------------------ r358042 | jimlin | 2019-04-09 18:56:32 -0700 (Tue, 09 Apr 2019) | 34 lines [Sparc] Fix incorrect MI insertion position for spilling f128. Summary: Obviously, new built MI (sethi+add or sethi+xor+add) for constructing large offset should be inserted before new created MI for storing even register into memory. So the insertion position should be *StMI instead of II. before fixed: std %f0, [%g1+80] sethi 4, %g1 <<< add %g1, %sp, %g1 <<< this two instructions should be put before "std %f0, [%g1+80]". sethi 4, %g1 add %g1, %sp, %g1 std %f2, [%g1+88] after fixed: sethi 4, %g1 add %g1, %sp, %g1 std %f0, [%g1+80] sethi 4, %g1 add %g1, %sp, %g1 std %f2, [%g1+88] Reviewers: venkatra, jyknight Reviewed By: jyknight Subscribers: jyknight, fedor.sergeev, jrtc27, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D60397 ------------------------------------------------------------------------ llvm-svn: 363010
2019-06-10Merging r351577:Tom Stellard1-1/+1
------------------------------------------------------------------------ r351577 | ssijaric | 2019-01-18 11:34:20 -0800 (Fri, 18 Jan 2019) | 5 lines Fix the buildbot issue introduced by r351421 The EXPENSIVE_CHECK x86_64 Windows buildbot is failing due to this change. Fix the map access. ------------------------------------------------------------------------ llvm-svn: 363006
2019-06-08Merging r361090:Tom Stellard9-59/+44
------------------------------------------------------------------------ r361090 | maskray | 2019-05-17 20:16:00 -0700 (Fri, 17 May 2019) | 34 lines [ARM][AArch64] Revert Android Bionic PT_TLS overaligning hack This reverts D53906. D53906 increased p_align of PT_TLS on ARM/AArch64 to 32/64 to make the static TLS layout compatible with Android Bionic's ELF TLS. However, this may cause glibc ARM/AArch64 programs to crash (see PR41527). The faulty PT_TLS in the executable satisfies p_vaddr%p_align != 0. The remainder is normally 0 but may be non-zero with the hack in place. The problem is that we increase PT_TLS's p_align after OutputSections' addresses are fixed (assignAddress()). It is possible that p_vaddr%old_p_align = 0 while p_vaddr%new_p_align != 0. For a thread local variable defined in the executable, lld computed TLS offset (local exec) is different from glibc computed TLS offset from another module (initial exec/generic dynamic). Note: PR41527 said the bug affects initial exec but actually generic dynamic is affected as well. (glibc is correct in that it compute offsets that satisfy `offset%p_align == p_vaddr%p_align`, which is a basic ELF requirement. This hack appears to work on FreeBSD rtld, musl<=1.1.22, and Bionic, but that is just because they (and lld) incorrectly compute offsets that satisfy `offset%p_align = 0` instead.) Android developers are fine to revert this patch, carry this patch in their tree before figuring out a long-term solution (e.g. a dummy .tdata with sh_addralign=64 sh_size={0,1} in crtbegin*.o files. The overhead is now insignificant after D62059). Reviewed By: rprichard, srhines Differential Revision: https://reviews.llvm.org/D62055 ------------------------------------------------------------------------ llvm-svn: 362858
2019-06-07Merging r353905:Tom Stellard1-2/+3
------------------------------------------------------------------------ r353905 | hubert.reinterpretcast | 2019-02-12 16:55:30 -0800 (Tue, 12 Feb 2019) | 17 lines [xray][tests][RHDTS] Add -lstdc++ after LLVM libs, resolving link error with RHDTS Summary: A link error was encountered when using the Red Hat Developer Toolset. In the RHDTS, `libstdc++.so` is a linker script that may resolve symbols to a static library. This patch places `-lstdc++` later in the ordering. Reviewers: sfertile, nemanjai, tstellar, dberris Reviewed By: dberris Subscribers: dberris, mgorny, delcypher, jdoerfert, #sanitizers, llvm-commits Tags: #llvm, #sanitizers Differential Revision: https://reviews.llvm.org/D58144 ------------------------------------------------------------------------ llvm-svn: 362765
2019-06-06Merging r355154:Tom Stellard1-2/+2
------------------------------------------------------------------------ r355154 | joerg | 2019-02-28 15:33:09 -0800 (Thu, 28 Feb 2019) | 2 lines [PPC] Secure PLT only has meaning for PIC ------------------------------------------------------------------------ llvm-svn: 362729
2019-06-06Merging r361237:Tom Stellard2-6/+41
------------------------------------------------------------------------ r361237 | maskray | 2019-05-21 03:41:25 -0700 (Tue, 21 May 2019) | 14 lines [PPC64] Update LocalEntry from assigned symbols On PowerPC64 ELFv2 ABI, functions may have 2 entry points: global and local. The local entry point location of a function is stored in the st_other field of the symbol, as an offset relative to the global entry point. In order to make symbol assignments (e.g. .equ/.set) work properly with this, PPCTargetELFStreamer already copies the local entry bits from the source symbol to the destination one, on emitAssignment(). The problem is that this copy is performed only at the assignment location, where the source symbol may not yet have processed the .localentry directive, that sets the local entry. This may cause the destination symbol to end up with wrong local entry information. Other symbol info is not affected by this because, in this case, the destination symbol value is actually a symbol reference. This change keeps track of these assignments, and update all needed st_other fields when finish() is called. Patch by Leandro Lupori! Reviewed By: MaskRay Differential Revision: https://reviews.llvm.org/D56586 ------------------------------------------------------------------------ llvm-svn: 362671
2019-06-06Skip globals-fundamental test when Python is disabledTom Stellard1-1/+1
llvm-svn: 362670
2019-06-06Merging r360442:Tom Stellard2-0/+18
------------------------------------------------------------------------ r360442 | maskray | 2019-05-10 10:09:25 -0700 (Fri, 10 May 2019) | 12 lines [MC][ELF] Copy top 3 bits of st_other to .symver aliases On PowerPC64 ELFv2 ABI, the top 3 bits of st_other encode the local entry offset. A versioned symbol alias created by .symver should copy the bits from the source symbol. This partly fixes PR41048. A full fix needs tracking of .set assignments and updating st_other fields when finish() is called, see D56586. Patch by Alfredo Dal'Ava Júnior Differential Revision: https://reviews.llvm.org/D59436 ------------------------------------------------------------------------ llvm-svn: 362669
2019-06-06Merging r360439:Tom Stellard5-12/+67
------------------------------------------------------------------------ r360439 | maskray | 2019-05-10 09:24:57 -0700 (Fri, 10 May 2019) | 8 lines [llvm-objdump] Print st_other Add support for ".hidden" ".internal" ".protected" and " 0x%02x" for other st_other bits used by some architectures. Reviewed By: sfertile Differential Revision: https://reviews.llvm.org/D61718 ------------------------------------------------------------------------ llvm-svn: 362668
2019-06-05Merging r360293:Matt Arsenault8-74/+202
------------------------------------------------------------------------ r360293 | arsenm | 2019-05-08 15:09:57 -0700 (Wed, 08 May 2019) | 21 lines AMDGPU: Select VOP3 form of add The VOP3 form should always be the preferred selection, to be shrunk later. This should only be an optimization issue, but this partially works around a problem from clobbering VCC when SIFixSGPRCopies rewrites an SCC defining operation directly to VCC. 3 of the testcases are regressions from failing to fold the immediate in cases it should. These can be avoided by improving the VCC liveness handling in SIFoldOperands. Simply increasing the threshold to computeRegisterLiveness works, although this is common enough that VCC liveness should probably be tracked throughout the pass. The hack of leaving behind an implicit_def instruction to avoid breaking iterator wastes instruction count, which inhibits finding the VCC def in long chains of adds. Doing this however exposes different, worse looking regressions from poor scheduling behavior. This could probably be avoided around by forcing the shrink of the addc here, but the scheduler should probably be fixed. The r600 add test needs to be split out because it asserts on the arguments in the new test during the calling convention lowering. ------------------------------------------------------------------------ llvm-svn: 362658
2019-06-05Merging r359899:Matt Arsenault3-53/+197
------------------------------------------------------------------------ r359899 | arsenm | 2019-05-03 08:37:07 -0700 (Fri, 03 May 2019) | 7 lines AMDGPU: Select VOP3 form of sub The VOP3 form should always be the preferred selection form to be shrunk later. The r600 sub test needs to be split out because it asserts on the arguments in the new test during the calling convention lowering. ------------------------------------------------------------------------ llvm-svn: 362654
2019-06-05Merging r359898:Matt Arsenault2-35/+267
------------------------------------------------------------------------ r359898 | arsenm | 2019-05-03 08:21:53 -0700 (Fri, 03 May 2019) | 3 lines AMDGPU: Support shrinking add with FI in SIFoldOperands Avoids test regression in a future patch ------------------------------------------------------------------------ llvm-svn: 362648
2019-06-05Correct test in r362634Matt Arsenault1-10/+10
llvm-svn: 362635
2019-06-05Merging r359891:Matt Arsenault2-4/+64
------------------------------------------------------------------------ r359891 | arsenm | 2019-05-03 07:40:10 -0700 (Fri, 03 May 2019) | 9 lines AMDGPU: Replace shrunk instruction with dummy implicit_def This was broken if the original operand was killed. The kill flag would appear on both instructions, and fail the verifier. Keep the kill flag, but remove the operands from the old instruction. This has an added benefit of really reducing the use count for future folds. Ideally the pass would be structured more like what PeepholeOptimizer does to avoid this hack to avoid breaking instruction iterators. ------------------------------------------------------------------------ llvm-svn: 362634
2019-05-31Merging r360405:Tom Stellard9-59/+101
------------------------------------------------------------------------ r360405 | maskray | 2019-05-09 22:51:00 -0700 (Thu, 09 May 2019) | 25 lines [PPC64] Define getThunkSectionSpacing() based on the range of R_PPC64_REL24 Suggested by Sean Fertile and Peter Smith. Thunk section spacing decrease the total number of thunks. I measured a decrease of 1% or less in some large programs, with no perceivable slowdown in link time. Override getThunkSectionSpacing() to enable it. 0x2000000 is the farthest point R_PPC64_REL24 can reach. I tried several numbers and found 0x2000000 works the best. Numbers near 0x2000000 work as well but let's just use the simpler number. As demonstrated by the updated tests, this essentially changes placement of most thunks to the end of the output section. We leverage this property to fix PR40740 reported by Alfredo Dal'Ava Júnior: The output section .init consists of input sections from several object files (crti.o crtbegin.o crtend.o crtn.o). Sections other than the last one do not have a terminator. With this patch, we create the thunk after the last .init input section and thus fix the issue. This is not foolproof but works quite well for such sections (with no terminator) in practice. Reviewed By: ruiu, sfertile Differential Revision: https://reviews.llvm.org/D61720 ------------------------------------------------------------------------ llvm-svn: 362274
2019-05-31Merging part of r358975:Tom Stellard4-94/+81
Only merged the test changes in files that were also changed in r360405. ------------------------------------------------------------------------ r358975 | maskray | 2019-04-23 04:47:28 -0700 (Tue, 23 Apr 2019) | 18 lines [PPC][PPC64] Improve some llvm-objdump -d -D tests Various improvement: Some offsets in disassembly are incorrect after several layout adjustment. Fix them. llvm-objdump -D should not be used. -D dumps unrelated non-text sections. Replace them with llvm-objdump -d, llvm-readelf -x, etc Many llvm-objdump -d tests use {{.*}} . Add the option --no-show-raw-insn to avoid check hex bytes. ppc64-long-branch.s does not need a shared object. Delete it. Make ppc64-ifunc.s check 2 ifuncs. Reviewers: ruiu, espindola Subscribers: emaste, nemanjai, arichardson, kbarton, jsji, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D60998 ------------------------------------------------------------------------ llvm-svn: 362273
2019-05-30Merging r359883:Matt Arsenault0-0/+0
------------------------------------------------------------------------ r359883 | arsenm | 2019-05-03 06:42:56 -0700 (Fri, 03 May 2019) | 6 lines AMDGPU: Fix incorrect commute with sub when folding immediates When a fold of an immediate into a sub/subrev required shrinking the instruction, the wrong VOP2 opcode was used. This was using the VOP2 equivalent of the original instruction, not the commuted instruction with the inverted opcode. ------------------------------------------------------------------------ llvm-svn: 362161
2019-05-30Merging r353865, r353866, and r353874:Tom Stellard13-16/+73
------------------------------------------------------------------------ r353865 | sfertile | 2019-02-12 09:48:22 -0800 (Tue, 12 Feb 2019) | 1 line [PowerPC] Fix printing of negative offsets in call instruction dissasembly. ------------------------------------------------------------------------ ------------------------------------------------------------------------ r353866 | sfertile | 2019-02-12 09:49:04 -0800 (Tue, 12 Feb 2019) | 4 lines [PPC64] Update tests to reflect change in printing of call operand. [NFC] The printing of branch operands for call instructions was changed to properly handle negative offsets. Updating the tests to reflect that. ------------------------------------------------------------------------ ------------------------------------------------------------------------ r353874 | sfertile | 2019-02-12 12:03:04 -0800 (Tue, 12 Feb 2019) | 5 lines Fix undefined behaviour in PPCInstPrinter::printBranchOperand. Fix the undefined behaviour introduced by my previous patch r353865 (left shifting a potentially negative value), which was caught by the bots that run UBSan. ------------------------------------------------------------------------ llvm-svn: 362043
2019-05-29Merging r359606:Tom Stellard1-0/+7
------------------------------------------------------------------------ r359606 | amyk | 2019-04-30 13:09:00 -0700 (Tue, 30 Apr 2019) | 12 lines [compiler-rt][builtins][sanitizers] Update compiler-rt test cases for compatibility with system's toolchain This patch aims to: - Guard ompiler-rt/test/builtins/Unit/compiler_rt_logb_test.c with macros, so the test runs on GLIBC versions >= 2.23. This is because the test relies on comparing its computed values to libm. Oolder versions might not compute to the same value as the compiler-rt value. - Update compiler-rt/test/sanitizer_common/TestCases/Posix/getpw_getgr.cc so that std::string is not used, since false positives may be detected. Differential Revision: https://reviews.llvm.org/D60644 ------------------------------------------------------------------------ llvm-svn: 362024
2019-05-29Merging r353701:Tom Stellard1-7/+5
------------------------------------------------------------------------ r353701 | mgorny | 2019-02-11 06:09:48 -0800 (Mon, 11 Feb 2019) | 8 lines [lldb] [lit] Fix finding lld-link when it is not in 'compiler dir' Fix the build helper to find lld-link via PATH lookup, rather than making a fragile assumption that it will be present in the 'compiler directory'. This fixes tests on Gentoo where clang and lld are installed in different directories. Differential Revision: https://reviews.llvm.org/D58001 ------------------------------------------------------------------------ llvm-svn: 362017
2019-05-29Merging r353700:Tom Stellard3-1/+5
------------------------------------------------------------------------ r353700 | mgorny | 2019-02-11 06:09:43 -0800 (Mon, 11 Feb 2019) | 7 lines [lldb] [test] Skip lldb-mi test if LLDB_DISABLE_PYTHON is used Skip running lldb-mi tests when Python support is disabled. This causes lldb-mi to unconditionally fail, and therefore all the relevant tests fail as well. Differential Revision: https://reviews.llvm.org/D58000 ------------------------------------------------------------------------ llvm-svn: 362016
2019-05-29Merging r354184:Tom Stellard2-0/+52
------------------------------------------------------------------------ r354184 | ruiu | 2019-02-15 15:11:18 -0800 (Fri, 15 Feb 2019) | 10 lines [PPC64] Preserve LocalEntry when linking On PowerPC64, it is necessary to keep the LocalEntry bits in st_other, especially when -r is used. Otherwise, when the resulting object is used in a posterior linking, LocalEntry info will be unavailable and functions may be called through the wrong entrypoint. Patch by Leandro Lupori. Differential Revision: https://reviews.llvm.org/D56782 ------------------------------------------------------------------------ llvm-svn: 361921
2019-05-23Merging r360825:Tom Stellard1-2/+2
------------------------------------------------------------------------ r360825 | atanasyan | 2019-05-15 15:27:19 -0700 (Wed, 15 May 2019) | 14 lines [mips] Always use _LARGEFILE_SOURCE / _FILE_OFFSET_BITS for building MIPS 32-bit When MIPS 32-bit compiler-rt is building on 32-bit host or using 32-bit `DLLVM_HOST_TRIPLE` the `_LARGEFILE_SOURCE` and the `_FILE_OFFSET_BITS=64` macros defined by statements from the `HandleLLVMOptions.cmake`. In case of building 32-bit libraries on 64-bit host using default host triple these macros are not defined. As a result assertions check a consistency between the `struct_kernel_stat_sz` constant and the `struct_kernel_stat_sz` start to fail. To resolve this problem and enable building both 32/64-bit versions of MIPS compiler-rt libraries on 64-bit host at once always explicitly define the `_LARGEFILE_SOURCE` and the `_FILE_OFFSET_BITS=64` macros for MIPS 32-bit. ------------------------------------------------------------------------ llvm-svn: 361568
2019-05-23Merging r351523:Tom Stellard8-17/+70
------------------------------------------------------------------------ r351523 | dylanmckay | 2019-01-17 22:10:41 -0800 (Thu, 17 Jan 2019) | 12 lines [AVR] Expand 8/16-bit multiplication to libcalls on MCUs that don't have hardware MUL This change modifies the LLVM ISel lowering settings so that 8-bit/16-bit multiplication is expanded to calls into the compiler runtime library if the MCU being targeted does not support multiplication in hardware. Before this, MUL instructions would be generated on CPUs like the ATtiny85, triggering a CPU reset due to an illegal instruction at runtime. First raised in https://github.com/avr-rust/rust/issues/124. ------------------------------------------------------------------------ llvm-svn: 361551
2019-05-16Merging r355038:llvmorg-8.0.1-rc1Tom Stellard2-0/+7
------------------------------------------------------------------------ r355038 | joerg | 2019-02-27 13:53:14 -0800 (Wed, 27 Feb 2019) | 3 lines Default to Secure PLT on PPC for NetBSD and OpenBSD. This matches the default settings of clang. ------------------------------------------------------------------------ llvm-svn: 360950
2019-05-16Merging r352806:Tom Stellard2-1/+17
------------------------------------------------------------------------ r352806 | sbc | 2019-01-31 14:38:22 -0800 (Thu, 31 Jan 2019) | 5 lines [WebAssembly] MC: Fix for outputing wasm object to /dev/null Subscribers: dschuff, jgravelle-google, aheejin, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D57479 ------------------------------------------------------------------------ llvm-svn: 360949
2019-05-16Merging r360674:Tom Stellard3-4/+24
------------------------------------------------------------------------ r360674 | russell_gallop | 2019-05-14 07:01:40 -0700 (Tue, 14 May 2019) | 7 lines [Driver][Windows] Add dependent lib argument for profile instr generate This is needed so lld-link can find clang_rt.profile when self hosting on Windows with PGO. Using clang-cl as a linker knows to add the library but self hosting, using -DCMAKE_LINKER=<...>/lld-link.exe doesn't. Differential Revision: https://reviews.llvm.org/D61742 ------------------------------------------------------------------------ llvm-svn: 360828
2019-05-15Merging r354846:Tom Stellard2-3/+32
------------------------------------------------------------------------ r354846 | djg | 2019-02-25 21:20:19 -0800 (Mon, 25 Feb 2019) | 12 lines [WebAssembly] Properly align fp128 arguments in outgoing varargs arguments For outgoing varargs arguments, it's necessary to check the OrigAlign field of the corresponding OutputArg entry to determine argument alignment, rather than just computing an alignment from the argument value type. This is because types like fp128 are split into multiple argument values, with narrower types that don't reflect the ABI alignment of the full fp128. This fixes the printf("printfL: %4.*Lf\n", 2, lval); testcase. Differential Revision: https://reviews.llvm.org/D58656 ------------------------------------------------------------------------ llvm-svn: 360826
2019-05-15Merging r360212:Tom Stellard1-0/+2
------------------------------------------------------------------------ r360212 | kamil | 2019-05-07 17:44:41 -0700 (Tue, 07 May 2019) | 6 lines Fix build on NetBSD 8.99.38 With recent changes the dev/nvmm/nvmm_ioctl.h header is no longer a standalone NVMM header. Disable it until the NVMM operations will stabilize and be included in the ioctl(2) interceptors. ------------------------------------------------------------------------ llvm-svn: 360811
2019-05-15Merging r355141:Tom Stellard2-11/+82
------------------------------------------------------------------------ r355141 | rnk | 2019-02-28 13:05:41 -0800 (Thu, 28 Feb 2019) | 11 lines [COFF] Add address-taken import thunks to the fid table Summary: Fixes PR39799 Reviewers: dmajor, hans Subscribers: jdoerfert, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D58739 ------------------------------------------------------------------------ llvm-svn: 360803
2019-05-15Merging r359569:Tom Stellard1-0/+1
------------------------------------------------------------------------ r359569 | russell_gallop | 2019-04-30 08:35:16 -0700 (Tue, 30 Apr 2019) | 7 lines Add llvm-profdata to LLVM_TOOLCHAIN_TOOLS This is required for using PGO on Windows but isn't in the Windows release packages. Windows packages are built with LLVM_INSTALL_TOOLCHAIN_ONLY so only includes llvm "tools" listed here. Differential Revision: https://reviews.llvm.org/D61317 ------------------------------------------------------------------------ llvm-svn: 360801
2019-05-15Merging r360099:Tom Stellard2-26/+39
------------------------------------------------------------------------ r360099 | efriedma | 2019-05-06 16:21:59 -0700 (Mon, 06 May 2019) | 26 lines [ARM] Glue register copies to tail calls. This generally follows what other targets do. I don't completely understand why the special case for tail calls existed in the first place; even when the code was committed in r105413, call lowering didn't work in the way described in the comments. Stack protector lowering breaks if the register copies are not glued to a tail call: we have to insert the stack protector check before the tail call, and we choose the location based on the assumption that all physical register dependencies of a tail call are adjacent to the tail call. (See FindSplitPointForStackProtector.) This is sort of fragile, but I don't see any reason to break that assumption. I'm guessing nobody has seen this before just because it's hard to convince the scheduler to actually schedule the code in a way that breaks; even without the glue, the only computation that could actually be scheduled after the register copies is the computation of the call address, and the scheduler usually prefers to schedule that before the copies anyway. Fixes https://bugs.llvm.org/show_bug.cgi?id=41417 Differential Revision: https://reviews.llvm.org/D60427 ------------------------------------------------------------------------ llvm-svn: 360793
2019-05-15Merging r355621:Tom Stellard1-2/+2
------------------------------------------------------------------------ r355621 | petarj | 2019-03-07 10:28:44 -0800 (Thu, 07 Mar 2019) | 5 lines fix expected format in test/ELF/eh-frame-hdr-augmentation.s Follow-up for r355605. Fix expected format in test/ELF/eh-frame-hdr-augmentation.s ------------------------------------------------------------------------ llvm-svn: 360792
2019-05-15Merging r358547:Tom Stellard1-6/+6
------------------------------------------------------------------------ r358547 | ruiu | 2019-04-16 19:12:47 -0700 (Tue, 16 Apr 2019) | 9 lines Fix a crash bug caused by a nested call of parallelForEach. parallelForEach is not reentrant. We use parallelForEach to call each section's writeTo(), so calling the same function within writeTo() is not safe. Fixes https://bugs.llvm.org/show_bug.cgi?id=41508 Differential Revision: https://reviews.llvm.org/D60757 ------------------------------------------------------------------------ llvm-svn: 360791
2019-05-15Merging r359883:Tom Stellard2-9/+12
------------------------------------------------------------------------ r359883 | arsenm | 2019-05-03 06:42:56 -0700 (Fri, 03 May 2019) | 6 lines AMDGPU: Fix incorrect commute with sub when folding immediates When a fold of an immediate into a sub/subrev required shrinking the instruction, the wrong VOP2 opcode was used. This was using the VOP2 equivalent of the original instruction, not the commuted instruction with the inverted opcode. ------------------------------------------------------------------------ llvm-svn: 360752
2019-05-15Merging r356982:Tom Stellard2-1/+4
------------------------------------------------------------------------ r356982 | mstorsjo | 2019-03-26 02:02:44 -0700 (Tue, 26 Mar 2019) | 12 lines [llvm-dlltool] Set a proper machine type for weak symbol object files This makes GNU binutils not reject the libraries outright. GNU ld handles weak externals slightly differently though, so it can't use them for aliases in import libraries, but this makes GNU ld able to use the rest of the import libraries. LLD accepted object files with machine type 0 aka IMAGE_FILE_MACHINE_UNKNOWN. Differential Revision: https://reviews.llvm.org/D59742 ------------------------------------------------------------------------ llvm-svn: 360750
2019-05-15Merging r360512:Tom Stellard2-17/+57
------------------------------------------------------------------------ r360512 | ctopper | 2019-05-10 21:19:33 -0700 (Fri, 10 May 2019) | 5 lines [X86] Don't emit MOVNTDQA loads from fast-isel without SSE4.1. We were checking for SSE4.1 for FP types, but not integer 128-bit types. Fixes PR41837. ------------------------------------------------------------------------ llvm-svn: 360749
2019-05-04Merging r357885:Tom Stellard2-0/+19
------------------------------------------------------------------------ r357885 | ruiu | 2019-04-07 23:45:07 -0700 (Sun, 07 Apr 2019) | 13 lines Fix -emit-reloc against local symbols. Previously, we drop symbols starting with .L from the symbol table, so if there is a relocation that refers a .L symbol, it ended up referencing a null -- which happened to be interpreted as an absolute symbol. This patch copies all symbols including local ones if -emit-reloc is given. Fixes https://bugs.llvm.org/show_bug.cgi?id=41385 Differential Revision: https://reviews.llvm.org/D60306 ------------------------------------------------------------------------ llvm-svn: 359956
2019-05-04Merging r359496:Tom Stellard2-1/+169
------------------------------------------------------------------------ r359496 | mstorsjo | 2019-04-29 13:25:51 -0700 (Mon, 29 Apr 2019) | 8 lines [X86] Run CFIInstrInserter on Windows if Dwarf is used This is necessary since SVN r330706, as tail merging can include CFI instructions since then. This fixes PR40322 and PR40012. Differential Revision: https://reviews.llvm.org/D61252 ------------------------------------------------------------------------ llvm-svn: 359952
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