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2020-07-28[X86][SSE] Attempt to match OP(SHUFFLE(X,Y),SHUFFLE(X,Y)) -> SHUFFLE(HOP(X,Y))llvmorg-11.0.0-rc1Simon Pilgrim7-409/+321
An initial backend patch towards fixing the various poor HADD combines (PR34724, PR41813, PR45747 etc.). This extends isHorizontalBinOp to check if we have per-element horizontal ops (odd+even element pairs), but not in the expected serial order - in which case we build a "post shuffle mask" that we can apply to the HOP result, assuming we have fast-hops/optsize etc. The next step will be to extend the SHUFFLE(HOP(X,Y)) combines as suggested on PR41813 - accepting more post-shuffle masks even on slow-hop targets if we can fold it into another shuffle. Differential Revision: https://reviews.llvm.org/D83789 (cherry picked from commit 182111777b4ec215eeebe8ab5cc2a324e2f055ff)
2020-07-28[X86][SSE] Add additional (f)add(shuffle(x,y),shuffle(x,y)) tests for D83789Simon Pilgrim1-0/+405
(cherry picked from commit bfc4294ef61d5cf69fffe6b64287a323c003d90f)
2020-07-28[X86] Detect if EFLAGs is live across XBEGIN pseudo instruction. Add it as ↵Craig Topper2-21/+75
livein to the basic blocks created when expanding the pseudo XBEGIN causes several based blocks to be inserted. If flags are live across it we need to make eflags live in the new basic blocks to avoid machine verifier errors. Fixes PR46827 Reviewed By: ivanbaev Differential Revision: https://reviews.llvm.org/D84479 (cherry picked from commit 647e861e080382593648b234668ad2f5a376ac5e)
2020-07-27Drop the 'git' suffix from various version variablesHans Wennborg4-4/+4
2020-07-27[BasicAA] Fix -basicaa-recphi for geps with negative offsetsDavid Green2-31/+34
As shown in D82998, the basic-aa-recphi option can cause miscompiles for gep's with negative constants. The option checks for recursive phi, that recurse through a contant gep. If it finds one, it performs aliasing calculations using the other phi operands with an unknown size, to specify that an unknown number of elements after the initial value are potentially accessed. This works fine expect where the constant is negative, as the size is still considered to be positive. So this patch expands the check to make sure that the constant is also positive. Differential Revision: https://reviews.llvm.org/D83576 (cherry picked from commit 311fafd2c90aed5b3fed9566503eebe629f1e979)
2020-07-27[BasicAA] Add additional negative phi tests. NFCDavid Green1-0/+106
(cherry picked from commit 30fa57662760e1489cf70cb411c55fbe9fc189fe)
2020-07-27[LLD] [COFF] Fix mingw comdat associativity for leader symbols with a ↵Martin Storsjö3-5/+87
different name For a weak symbol func in a comdat, the actual leader symbol ends up named like .weak.func.default*. Likewise, for stdcall on i386, the symbol may be named _func@4, while the section suffix only is "func", which the previous implementation didn't handle. This fixes unwinding through weak functions when using -ffunction-sections in mingw environments. Differential Revision: https://reviews.llvm.org/D84607 (cherry picked from commit 343ffa70fc4c55f4dc0d717cf8c168865beaa9c4)
2020-07-27[LLD] [COFF] Fix test to properly test all aspects of c3b1d730d6. NFC.Martin Storsjö1-1/+1
Previously, the test could pass with one part of c3b1d730d6 removed. (cherry picked from commit 8dc820393219c7ee440b4ec86c9a201301943276)
2020-07-27[JumpThreading] ProcessBranchOnXOR(): bailout if any pred ends in indirect ↵Roman Lebedev2-0/+60
branch (PR46857) SplitBlockPredecessors() can not split blocks that have such terminators, and in two other places we already ensure that we don't end up calling SplitBlockPredecessors() on such blocks. Do so in one more place. Fixes https://bugs.llvm.org/show_bug.cgi?id=46857 (cherry picked from commit 1da9834557cd4302a5183b8228ce063e69f82602)
2020-07-27[PowerPC][NFC] Fix an assert that cannot trip from 7d076e19e31aNemanja Ivanovic1-2/+3
I mixed up the precedence of operators in the assert and thought I had it right since there was no compiler warning. This just adds the parentheses in the expression as needed. (cherry picked from commit cdead4f89c0eecf11f50092bc088e3a9c6511825)
2020-07-27[PowerPC] Fix computation of offset for load-and-splat for permuted loadsNemanja Ivanovic2-8/+106
Unfortunately this is another regression from my canonicalization patch (1fed131660b2). The patch contained two implicit assumptions: 1. That we would have a permuted load only if we are loading a partial vector 2. That a partial vector load would necessarily be as wide as the splat However, assumption 2 is not correct since it is possible to do a wider load and only splat a half of it. This patch corrects this assumption by simply checking if the load is permuted and adjusting the offset if it is. (cherry picked from commit 7d076e19e31a2a32e357cbdcf0183f88fe1fb0fb)
2020-07-27[LegalizeTypes] Teach DAGTypeLegalizer::GenWidenVectorLoads to pad with ↵Craig Topper2-15/+59
undef if needed when concatenating small or loads to match a larger load In the included test case the align 16 allowed the v23f32 load to handled as load v16f32, load v4f32, and load v4f32(one element not used). These loads all need to be concatenated together into a final vector. In this case we tried to concatenate the two v4f32 loads to match the type of the v16f32 load so we could do a second concat_vectors, but those loads alone only add up to v8f32. So we need to two v4f32 undefs to pad it. It appears we've tried to hack around a similar issue in this code before by adding undef padding to loads in one of the earlier loops in this function. Originally in r147964 by padding all loads narrower than previous loads to the same size. Later modifed to only the last load in r293088. This patch removes that earlier code and just handles it on demand where we know we need it. Fixes PR46820 Differential Revision: https://reviews.llvm.org/D84463 (cherry picked from commit 8131e190647ac2b5b085b48a6e3b48c1d7520a66)
2020-07-27[OPENMP] Fix PR46730: Fix compiler crash on taskloop over constructible loop ↵Alexey Bataev2-1/+21
counters. Summary: If the variable is constrcutible, its copy is created by calling a constructor. Such variables are duplicated and thus, must be captured. Reviewers: jdoerfert Subscribers: yaxunl, guansong, cfe-commits, sstefan1, caomhin Tags: #clang Differential Revision: https://reviews.llvm.org/D83909 (cherry picked from commit 9840208db6980f690d09b209e6ad6d57133ec5e5)
2020-07-27[llvm-lib] Support adding short import library objects with llvm-libMartin Storsjö3-3/+17
This fixes PR 42837. Differential Revision: https://reviews.llvm.org/D84465 (cherry picked from commit 4d09ed953b5b8c70d9ca0aeaed8f26a237b612c6)
2020-07-27[MC] [COFF] Make sure that weak external symbols are undefined symbolsMartin Storsjö2-0/+35
For comdats (e.g. caused by -ffunction-sections), Section is already set here; make sure it's null, for the weak external symbol to be undefined. This fixes PR46779. Differential Revision: https://reviews.llvm.org/D84507 (cherry picked from commit 9e81d8bbf19d72fca3d87b7334c613d1aa2a5795)
2020-07-27[RISCV] Add matching of codegen patterns to RISCV Bit Manipulation Zbt asm ↵lewis-revill6-0/+929
instructions This patch provides optimization of bit manipulation operations by enabling the +experimental-b target feature. It adds matching of single block patterns of instructions to specific bit-manip instructions from the ternary subset (zbt subextension) of the experimental B extension of RISC-V. It adds also the correspondent codegen tests. This patch is based on Claire Wolf's proposal for the bit manipulation extension of RISCV: https://github.com/riscv/riscv-bitmanip/blob/master/bitmanip-0.92.pdf Differential Revision: https://reviews.llvm.org/D79875 (cherry picked from commit c9c955ada8e65205312f2bc41b46eefa0e98b36c)
2020-07-27[RISCV] Add matching of codegen patterns to RISCV Bit Manipulation Zbs asm ↵lewis-revill3-0/+649
instructions This patch provides optimization of bit manipulation operations by enabling the +experimental-b target feature. It adds matching of single block patterns of instructions to specific bit-manip instructions from the single-bit subset (zbs subextension) of the experimental B extension of RISC-V. It adds also the correspondent codegen tests. This patch is based on Claire Wolf's proposal for the bit manipulation extension of RISCV: https://github.com/riscv/riscv-bitmanip/blob/master/bitmanip-0.92.pdf Differential Revision: https://reviews.llvm.org/D79874 (cherry picked from commit d4be33374c07ea9a9362892876aa76b227298181)
2020-07-27[RISCV] Add matching of codegen patterns to RISCV Bit Manipulation Zbbp asm ↵lewis-revill6-2/+1571
instructions This patch provides optimization of bit manipulation operations by enabling the +experimental-b target feature. It adds matching of single block patterns of instructions to specific bit-manip instructions belonging to both the permutation and the base subsets of the experimental B extension of RISC-V. It adds also the correspondent codegen tests. This patch is based on Claire Wolf's proposal for the bit manipulation extension of RISCV: https://github.com/riscv/riscv-bitmanip/blob/master/bitmanip-0.92.pdf Differential Revision: https://reviews.llvm.org/D79873 (cherry picked from commit 6144f0a1e52e7f5439a67267ca65f2d72c21aaa6)
2020-07-27[RISCV] Add matching of codegen patterns to RISCV Bit Manipulation Zbp asm ↵lewis-revill4-1/+2784
instructions This patch provides optimization of bit manipulation operations by enabling the +experimental-b target feature. It adds matching of single block patterns of instructions to specific bit-manip instructions from the permutation subset (zbp subextension) of the experimental B extension of RISC-V. It adds also the correspondent codegen tests. This patch is based on Claire Wolf's proposal for the bit manipulation extension of RISCV: https://github.com/riscv/riscv-bitmanip/blob/master/bitmanip-0.92.pdf Differential Revision: https://reviews.llvm.org/D79871 (cherry picked from commit 31b52b4345e36b169a2b6a89eac44651f59889dd)
2020-07-27[RISCV] Add matching of codegen patterns to RISCV Bit Manipulation Zbb asm ↵lewis-revill6-3/+2645
instructions This patch provides optimization of bit manipulation operations by enabling the +experimental-b target feature. It adds matching of single block patterns of instructions to specific bit-manip instructions from the base subset (zbb subextension) of the experimental B extension of RISC-V. It adds also the correspondent codegen tests. This patch is based on Claire Wolf's proposal for the bit manipulation extension of RISCV: https://github.com/riscv/riscv-bitmanip/blob/master/bitmanip-0.92.pdf Differential Revision: https://reviews.llvm.org/D79870 (cherry picked from commit e2692f0ee7f338fea4fc918669643315cefc7678)
2020-07-24Fix issue in typo handling which could lead clang to hangDavid Goldman4-9/+73
Summary: We need to detect when certain TypoExprs are not being transformed due to invalid trees, otherwise we risk endlessly trying to fix it. Reviewers: rsmith Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D84067 (cherry picked from commit dde98c82c0ad02410229e7e5c9efcbb0ab42a995)
2020-07-24[clang] Fix libdl linking for libclang in standalone modeTobias Hieta1-1/+6
Differential Revision: https://reviews.llvm.org/D81385 (cherry picked from commit a41af6e41e6fcf3e7030feaf24057cbe8291b748)
2020-07-23[X86][AVX] getTargetShuffleMask - don't decode ↵Simon Pilgrim8-259/+244
VBROADCAST(EXTRACT_SUBVECTOR(X,0)) patterns. getTargetShuffleMask is used by the various "SimplifyDemanded" folds so we can't assume that the bypassed extract_subvector can be safely simplified - getFauxShuffleMask performs a more general decode that allows us to more safely catch many of these cases so the impact is minimal. (cherry picked from commit 5b5dc2442ac7a574a3b7d17c15ebeeb9eb3bec26)
2020-07-23[InstCombine] Fix store merge worklist management (PR46680)Nikita Popov3-12/+12
Fixes https://bugs.llvm.org/show_bug.cgi?id=46680. Just like insertions through IRBuilder, InsertNewInstBefore() should be using the deferred worklist mechanism, so that processing of newly added instructions is prioritized. There's one side-effect of the worklist order change which could be classified as a regression. An add op gets pushed through a select that at the time is not a umax. We could add a reverse transform that tries to push adds in the reverse direction to restore a min/max, but that seems like a sure way of getting infinite loops... Seems like something that should best wait on min/max intrinsics. Differential Revision: https://reviews.llvm.org/D84109 (cherry picked from commit d12ec0f752e7f2c7f7252539da2d124264ec33f7)
2020-07-23[InstCombine] Add test for PR46680 (NFC)Nikita Popov1-0/+92
(cherry picked from commit 13ae440de4a408cf9d1a448def09769ecbecfdf7)
2020-07-23Drop the npm run line from llvm/test/Analysis/ScalarEvolution/pr46786.llHans Wennborg1-1/+0
since it's failing.
2020-07-23[SCEV] Remove premature assert. PR46786Max Kazantsev2-4/+38
This assert was added to verify assumption that GEP's SCEV will be of pointer type, basing on fact that it should be a SCEVAddExpr with (at least) last operand being pointer. Two notes: - GEP's SCEV does not have to be a SCEVAddExpr after all simplifications; - In current state, GEP's SCEV does not have to have at least one pointer operands (all of them can become int during the transforms). However, we might want to be at a point where it is true. We are currently removing this assert and will try to enumerate the cases where "is pointer" notion might be lost during the transforms. When all of them are fixed, we can return it. Differential Revision: https://reviews.llvm.org/D84294 Reviewed By: lebedev.ri (cherry picked from commit b96114c1e1fc4448ea966bce013706359aee3fa9)
2020-07-23add -fpch-codegen/debuginfo mapping to -fmodules-codegen/debuginfoLuboš Luňák4-6/+42
Using -fmodules-* options for PCHs is a bit confusing, so add -fpch-* variants. Having extra options also makes it simple to do a configure check for the feature. Also document the options in the release notes. Differential Revision: https://reviews.llvm.org/D83623 (cherry picked from commit 54eea6127c4d77db03787b7c55765632fb9a6f1c)
2020-07-23accept 'clang++ -c a.pch -o a.o' to create PCH's object fileLuboš Luňák4-8/+47
This way should be the same like with a.pcm for modules. An alternative way is 'clang++ -c empty.cpp -include-pch a.pch -o a.o -Xclang -building-pch-with-obj', which is what clang-cl's /Yc does internally. Differential Revision: https://reviews.llvm.org/D83716 (cherry picked from commit 3895466e2c336c0797710ae35150ba1ce6bc0b96)
2020-07-22[PowerPC] Fix wrong codegen when stack pointer has to realign performing ↵Kai Luo6-160/+198
dynalloc Current powerpc backend generates wrong code sequence if stack pointer has to realign if `-fstack-clash-protection` enabled. When probing dynamic stack allocation, current `PREPARE_PROBED_ALLOCA` takes `NegSizeReg` as input and returns `FinalStackPtr`. `FinalStackPtr=StackPtr+ActualNegSize` is calculated correctly, however code following `PREPARE_PROBED_ALLOCA` still uses value of `NegSizeReg`, which does not contain `ActualNegSize` if `MaxAlign > TargetAlign`, to calculate loop trip count and residual number of bytes. This patch is part of fix of https://bugs.llvm.org/show_bug.cgi?id=46759. Differential Revision: https://reviews.llvm.org/D84152 (cherry picked from commit c3f9697f1f227296818fbaf1a770a29842ea454c)
2020-07-22[PowerPC] Fix wrong codegen when stack pointer has to realign in prologueKai Luo2-5/+4
Current powerpc backend generates wrong code sequence if stack pointer has to realign if -fstack-clash-protection enabled. When probing in prologue, backend should generate a subtraction instruction rather than a `stux` instruction to realign the stack pointer. This patch is part of fix of https://bugs.llvm.org/show_bug.cgi?id=46759. Differential Revision: https://reviews.llvm.org/D84218 (cherry picked from commit 8912252252c87d8ef6623ecf9fdde444560ee4b9)
2020-07-22[PowerPC] Precommit test case for PR46759. NFC.Kai Luo1-0/+58
(cherry picked from commit 817767abeec8343b20de83f8b1b2c8c20bbbe00a)
2020-07-22[LLD][COFF] Skip computation of the undefined symbols references that are ↵Sylvain Audi3-21/+69
not shown The "undefined symbol" error message from lld-link displays up to 3 references to that symbol, and the number of extra references not shown. This patch removes the computation of the strings for those extra references. It fixes a freeze of lld-link we accidentally encountered when activating asan on a large project, without linking with the asan library. In that case, __asan_report_load8 was referenced more than 2 million times, causing the computation of that many display strings, of which only 3 were used. Differential Revision: https://reviews.llvm.org/D83510 (cherry picked from commit 3a108ab256dba7b5a7304f0e83818673d334405f)
2020-07-21[LLVMgold.so][test] Fix tests after D84132/55fa315b0352Fangrui Song3-4/+3
(cherry picked from commit aa830e9768303ff8d27c015759294c4ce704d50c)
2020-07-21[LLVMgold.so] -plugin-opt=save-temps: save combined module to .lto.o instead ↵Fangrui Song4-13/+13
of .o This matches LLD and fixes https://sourceware.org/bugzilla/show_bug.cgi?id=26262#c1 .o is a bad choice for save-temps output because it is easy to override the bitcode file (*.o) ``` # Use bfd for the example, -fuse-ld=gold is similar. clang -flto -c a.c # generate bitcode file a.o clang -fuse-ld=bfd -flto a.o -o a -Wl,-plugin-opt=save-temps # override a.o # The user repeats the command but get surprised, because a.o is now a combined module. clang -fuse-ld=bfd -flto a.o -o a -Wl,-plugin-opt=save-temps ``` Reviewed By: tejohnson Differential Revision: https://reviews.llvm.org/D84132 (cherry picked from commit 55fa315b0352b63454206600d6803fafacb42d5e)
2020-07-21[ConstantFolding] check applicability of AllOnes constant creation firstJameson Nash2-2/+52
The getAllOnesValue can only handle things that are bitcast from a ConstantInt, while here we bitcast through a pointer, so we may see more complex objects (like Array or Struct). Differential Revision: https://reviews.llvm.org/D83870 (cherry picked from commit 8b354cc8db413f596c95b4f3240fabaa3e2c931e)
2020-07-21[LLDB] [COFF] Fix handling of symbols with more than one aux symbolMartin Storsjö2-1/+11
Differential Revision: https://reviews.llvm.org/D84070 (cherry picked from commit f07ddbc9c4b66e91aa7a106042512ee903b6b3ba)
2020-07-20Require shell for lld/test/ELF/arm-exidx-range.sHans Wennborg1-1/+1
The test fails in 32-bit Windows builds for unclear reasons: ld.lld: error: failed to open C:\src\llvm_package_1100-rc1\build32_stage0\tools\lld\test\ELF\Output\arm-exidx-range.s.tmp: The parameter is incorrect. (cherry picked from commit 8a197e0b16f2a0f560633f70886f4cdf3b7e20b4)
2020-07-20[ms] [llvm-ml] Remove unused functionEric Astor1-3/+0
Summary: Remove unused function Reviewed By: lbenes Differential Revision: https://reviews.llvm.org/D83898 (cherry picked from commit 47a3b85a97136fca4a388646cbaec10b71414b60)
2020-07-20[X86] Allow lsl/lar to be parsed with a GR16, GR32, or GR64 as source register.Craig Topper6-18/+48
This matches GNU assembler behavior. Operand size is determined only from the destination register. (cherry picked from commit 71b49aa438b22b02230fff30e8874ff756336e6d)
2020-07-20[X86] Teach assembler parser to accept lsl and lar with a 64 or 32 source ↵Craig Topper2-2/+10
register when the destination is a 64 register. Previously we only accepted a 32-bit source with a 64-bit dest. Accepting 64-bit as well is more consistent with gas behavior. I think maybe we should accept 16 bit register as well, but I'm not sure. (cherry picked from commit 3c2a56a857227b6bc39285747269f02cd7a9dbe5)
2020-07-20[RISCV] Add support for -mcpu option.Zakk Chen11-34/+262
Summary: 1. gcc uses `-march` and `-mtune` flag to chose arch and pipeline model, but clang does not have `-mtune` flag, we uses `-mcpu` to chose both infos. 2. Add SiFive e31 and u54 cpu which have default march and pipeline model. 3. Specific `-mcpu` with rocket-rv[32|64] would select pipeline model only, and use the driver's arch choosing logic to get default arch. Reviewers: lenary, asb, evandro, HsiangKai Reviewed By: lenary, asb, evandro Tags: #llvm, #clang Differential Revision: https://reviews.llvm.org/D71124 (cherry picked from commit 294d1eae75bf8867821a4491f0d67445227f8470)
2020-07-20[InstCombine][Test] Test for fix of replacing select with Phis when branch ↵Max Kazantsev1-0/+15
has the same labels An additional test that allows to check the correctness of handling the case of the same branch labels in the dominator when trying to replace select with phi-node. Patch By: Kirill Polushin Differential Revision: https://reviews.llvm.org/D84006 Reviewed By: mkazantsev (cherry picked from commit df6e185e8f895686510117301e568e5043909b66)
2020-07-20[InstCombine] Fix replace select with Phis when branch has the same labelsMax Kazantsev1-0/+4
``` define i32 @test(i1 %cond) { entry: br i1 %cond, label %exit, label %exit exit: %result = select i1 %cond, i32 123, i32 456 ret i32 %result } ``` In this test, after applying transformation of replacing select with Phis, the result will be: ``` define i32 @test(i1 %cond) { entry: br i1 %cond, label %exit, label %exit exit: %result = i32 phi [123, %exit], [123, %exit] ret i32 %result } ``` That is, select is transformed into an invalid Phi, which will then be reduced to 123 and the second value will be lost. But it is worth noting that this problem will arise only if select is in the InstCombine worklist will be before the branch. Otherwise, InstCombine will replace the branch condition with false and transformation will not be applied. The fix is to check the target labels in the branch condition for equality. Patch By: Kirill Polushin Differential Revision: https://reviews.llvm.org/D84003 Reviewed By: mkazantsev (cherry picked from commit c98988107868db41c12b9d782fae25dea2a81c87)
2020-07-20[TSan] Optimize handling of racy addressJoachim Protze2-67/+87
This patch splits the handling of racy address and racy stack into separate functions. If a race was already reported for the address, we can avoid the cost for collecting the involved stacks. This patch also removes the race condition in storing the racy address / racy stack. This race condition allowed all threads to report the race. This patch changes the transitive suppression of reports. Previously suppression could transitively chain memory location and racy stacks. Now racy memory and racy stack are separate suppressions. Commit again, now with fixed tests. Reviewed by: dvyukov Differential Revision: https://reviews.llvm.org/D83625 (cherry picked from commit 7358a1104a02d5f5e645ebff0530787453ae98da)
2020-07-18[RelocationResolver] Support R_AARCH64_PREL32Fangrui Song2-0/+27
Code from D83800 by Yichao Yu (cherry picked from commit 3073a3aa1ef1ce8c9cac9b97a8e5905dd8779e16)
2020-07-18[RelocationResolver] Support R_PPC_REL32 & R_PPC64_REL{32,64}Fangrui Song2-2/+57
This suppresses `failed to compute relocation: R_PPC_REL32, Invalid data was encountered while parsing the file` and its 64-bit variants when running llvm-dwarfdump on a PowerPC object file with .eh_frame Unfortunately it is difficult to test the computation: DWARFDataExtractor::getEncodedPointer does not use the relocated value and even if it does, we need to teach llvm-dwarfdump --eh-frame to do some linker job to report a reasonable address. (cherry picked from commit b922004ea29d54534c4f09b9cfa655bf5f3360f0)
2020-07-17Remove TwoAddressInstructionPass::sink3AddrInstruction.James Y Knight7-207/+62
This function has a bug which will incorrectly reschedule instructions after an INLINEASM_BR (which can branch). (The bug may also allow scheduling past a throwing-CALL, I'm not certain.) I could fix that bug, but, as the removed FIXME notes, it's better to attempt rescheduling before converting to 3-addr form, as that may remove the need to convert in the first place. In fact, the code to do such reordering was added to this pass only a few months later, in 2011, via the addition of the function rescheduleMIBelowKill. That code does not contain the same bug. The removal of the sink3AddrInstruction function is not a no-op: in some cases it would move an instruction post-conversion, when rescheduleMIBelowKill would not move the instruction pre-converison. However, this does not appear to be important: the machine instruction scheduler can reorder the after-conversion instructions, in any case. This patch fixes a kernel panic 4.4 LTS x86_64 Linux kernels, when built with clang after 4b0aa5724feaa89a9538dcab97e018110b0e4bc3. Link: https://github.com/ClangBuiltLinux/linux/issues/1085 Differential Revision: https://reviews.llvm.org/D83708 (cherry picked from commit 60433c63acb71935111304d71e41b7ee982398f8)
2020-07-17[docs] Add Deprecated section to ReleaseNotesJinsong Ji1-0/+4
This is brought up in https://reviews.llvm.org/D83915. We would like to remove some feature in PowerPC. We did send RFC before, but we think it might be a better idea that we indicate planned removal in the Release Notes for version 11 and actual removal in those for version 12.. Reviewed By: hubert.reinterpretcast Differential Revision: https://reviews.llvm.org/D83968
2020-07-17Add -flang flag to the test-release.sh scriptHans Wennborg1-0/+7
The flag is off by default. (cherry picked from commit 033ef8420cec57187fffac1f06322f73aa945c4c)
generated by cgit v1.1 at 2024-09-07 05:03:15 +0000