diff options
Diffstat (limited to 'mlir/test/Integration/Dialect/Vector/CPU/ArmSME')
11 files changed, 49 insertions, 49 deletions
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/Emulated/test-setArmSVLBits.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/Emulated/test-setArmSVLBits.mlir index 4151811..1794564 100644 --- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/Emulated/test-setArmSVLBits.mlir +++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/Emulated/test-setArmSVLBits.mlir @@ -12,13 +12,13 @@ func.func @checkSVL() { %svl_h = arm_sme.streaming_vl <half> %svl_w = arm_sme.streaming_vl <word> %svl_d = arm_sme.streaming_vl <double> - vector.print str "SVL.b" + vector.print str "SVL.b\n" vector.print %svl_b : index - vector.print str "SVL.h" + vector.print str "SVL.h\n" vector.print %svl_h : index - vector.print str "SVL.w" + vector.print str "SVL.w\n" vector.print %svl_w : index - vector.print str "SVL.d" + vector.print str "SVL.d\n" vector.print %svl_d : index return } diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/load-store-128-bit-tile.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/load-store-128-bit-tile.mlir index 2b8899b..41e7248 100644 --- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/load-store-128-bit-tile.mlir +++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/load-store-128-bit-tile.mlir @@ -53,13 +53,13 @@ func.func @test_load_store_zaq0() { // CHECK-LABEL: INITIAL TILE A: // CHECK: ( 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7 ) - vector.print str "INITIAL TILE A:" + vector.print str "INITIAL TILE A:\n" func.call @print_i8s(%tile_a_bytes, %zaq_size_bytes) : (memref<?xi8>, index) -> () vector.print punctuation <newline> // CHECK-LABEL: INITIAL TILE B: // CHECK: ( 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64 ) - vector.print str "INITIAL TILE B:" + vector.print str "INITIAL TILE B:\n" func.call @print_i8s(%tile_b_bytes, %zaq_size_bytes) : (memref<?xi8>, index) -> () vector.print punctuation <newline> @@ -68,13 +68,13 @@ func.func @test_load_store_zaq0() { // CHECK-LABEL: FINAL TILE A: // CHECK: ( 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7 ) - vector.print str "FINAL TILE A:" + vector.print str "FINAL TILE A:\n" func.call @print_i8s(%tile_a_bytes, %zaq_size_bytes) : (memref<?xi8>, index) -> () vector.print punctuation <newline> // CHECK-LABEL: FINAL TILE B: // CHECK: ( 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7 ) - vector.print str "FINAL TILE B:" + vector.print str "FINAL TILE B:\n" func.call @print_i8s(%tile_b_bytes, %zaq_size_bytes) : (memref<?xi8>, index) -> () return diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-load-vertical.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-load-vertical.mlir index 27be801..68c31ac 100644 --- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-load-vertical.mlir +++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-load-vertical.mlir @@ -49,12 +49,12 @@ func.func @entry() { // CHECK-NEXT: ( 2, 2, 2, 2 // CHECK-NEXT: ( 3, 3, 3, 3 // CHECK: TILE END - vector.print str "TILE BEGIN" + vector.print str "TILE BEGIN\n" scf.for %i = %c0 to %za_s_size step %svl_s { %tileslice = vector.load %mem1[%i] : memref<?xi32>, vector<[4]xi32> vector.print %tileslice : vector<[4]xi32> } - vector.print str "TILE END" + vector.print str "TILE END\n" // 2. VERTICAL LAYOUT // Dump "mem2". The smallest SVL is 128-bits so the tile will be at least @@ -66,9 +66,9 @@ func.func @entry() { // CHECK-NEXT: ( 0, 1, 2, 3 // CHECK-NEXT: ( 0, 1, 2, 3 // CHECK: TILE END - vector.print str "TILE BEGIN" + vector.print str "TILE BEGIN\n" vector.print %0 : vector<[4]x[4]xi32> - vector.print str "TILE END" + vector.print str "TILE END\n" return } diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-multi-tile-transpose.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-multi-tile-transpose.mlir index 9d836d9..cd48f2a 100644 --- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-multi-tile-transpose.mlir +++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-multi-tile-transpose.mlir @@ -46,12 +46,12 @@ func.func @testTransposedReadWithMask(%maskRows: index, %maskCols: index) { vector.transfer_write %readTransposed, %outDyn[%c0, %c0] {in_bounds = [true, true]} : vector<[16]x[4]xf32>, memref<?x?xf32> /// Print the input memref. - vector.print str "Input memref:" + vector.print str "Input memref:\n" %inUnranked = memref.cast %inDyn : memref<?x?xf32> to memref<*xf32> call @printMemrefF32(%inUnranked) : (memref<*xf32>) -> () /// Print the result memref. - vector.print str "Masked transposed result:" + vector.print str "Masked transposed result:\n" %outUnranked = memref.cast %outDyn : memref<?x?xf32> to memref<*xf32> call @printMemrefF32(%outUnranked) : (memref<*xf32>) -> () @@ -84,12 +84,12 @@ func.func @testTransposedWriteWithMask(%maskRows: index, %maskCols: index) { : vector<[16]x[4]xf32>, memref<?x?xf32> /// Print the input memref. - vector.print str "Input memref:" + vector.print str "Input memref:\n" %inUnranked = memref.cast %inDyn : memref<?x?xf32> to memref<*xf32> call @printMemrefF32(%inUnranked) : (memref<*xf32>) -> () /// Print the result memref. - vector.print str "Masked transposed result:" + vector.print str "Masked transposed result:\n" %outUnranked = memref.cast %outDyn : memref<?x?xf32> to memref<*xf32> call @printMemrefF32(%outUnranked) : (memref<*xf32>) -> () diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f32.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f32.mlir index 7e7869d..fb6c06c 100644 --- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f32.mlir +++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f32.mlir @@ -35,9 +35,9 @@ func.func @test_outerproduct_no_accumulator_4x4xf32() { // WITHOUT-ACC-NEXT: ( 0, 2, 4, 6 // WITHOUT-ACC-NEXT: ( 0, 3, 6, 9 // WITHOUT-ACC: TILE END - vector.print str "TILE BEGIN" + vector.print str "TILE BEGIN\n" vector.print %tile : vector<[4]x[4]xf32> - vector.print str "TILE END" + vector.print str "TILE END\n" return } @@ -60,9 +60,9 @@ func.func @test_outerproduct_with_accumulator_4x4xf32() { // WITH-ACC-NEXT: ( 10, 12, 14, 16 // WITH-ACC-NEXT: ( 10, 13, 16, 19 // WITH-ACC: TILE END - vector.print str "TILE BEGIN" + vector.print str "TILE BEGIN\n" vector.print %tile : vector<[4]x[4]xf32> - vector.print str "TILE END" + vector.print str "TILE END\n" return } @@ -91,9 +91,9 @@ func.func @test_masked_outerproduct_no_accumulator_4x4xf32() { // WITH-MASK-NEXT: ( 3, 6, 0, 0 // WITH-MASK-NEXT: ( 0, 0, 0, 0 // WITH-MASK: TILE END - vector.print str "TILE BEGIN" + vector.print str "TILE BEGIN\n" vector.print %tile : vector<[4]x[4]xf32> - vector.print str "TILE END" + vector.print str "TILE END\n" return } @@ -124,9 +124,9 @@ func.func @test_masked_outerproduct_with_accumulator_4x4xf32() { // WITH-MASK-AND-ACC-NEXT: ( 10, 10, 10, 10 // WITH-MASK-AND-ACC-NEXT: ( 10, 10, 10, 10 // WITH-MASK-AND-ACC: TILE END - vector.print str "TILE BEGIN" + vector.print str "TILE BEGIN\n" vector.print %tile : vector<[4]x[4]xf32> - vector.print str "TILE END" + vector.print str "TILE END\n" return } diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f64.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f64.mlir index 46bf799..b845860 100644 --- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f64.mlir +++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f64.mlir @@ -40,9 +40,9 @@ func.func @test_outerproduct_no_accumulator_2x2xf64() { // CHECK-NEXT: ( 1, 2 // CHECK-NEXT: ( 2, 4 // CHECK: TILE END - vector.print str "TILE BEGIN" + vector.print str "TILE BEGIN\n" vector.print %tile : vector<[2]x[2]xf64> - vector.print str "TILE END" + vector.print str "TILE END\n" return } @@ -66,9 +66,9 @@ func.func @test_outerproduct_with_accumulator_2x2xf64() { // WITH-ACC-NEXT: ( 11, 12 // WITH-ACC-NEXT: ( 12, 14 // WITH-ACC: TILE END - vector.print str "TILE BEGIN" + vector.print str "TILE BEGIN\n" vector.print %tile : vector<[2]x[2]xf64> - vector.print str "TILE END" + vector.print str "TILE END\n" return } @@ -96,9 +96,9 @@ func.func @test_masked_outerproduct_no_accumulator_2x2xf64() { // WITH-MASK-NEXT: ( 1, 0 // WITH-MASK-NEXT: ( 2, 0 // WITH-MASK: TILE END - vector.print str "TILE BEGIN" + vector.print str "TILE BEGIN\n" vector.print %tile : vector<[2]x[2]xf64> - vector.print str "TILE END" + vector.print str "TILE END\n" return } @@ -127,9 +127,9 @@ func.func @test_masked_outerproduct_with_accumulator_2x2xf64() { // WITH-MASK-AND-ACC-NEXT: ( 11, 12 // WITH-MASK-AND-ACC-NEXT: ( 10, 10 // WITH-MASK-AND-ACC: TILE END - vector.print str "TILE BEGIN" + vector.print str "TILE BEGIN\n" vector.print %tile : vector<[2]x[2]xf64> - vector.print str "TILE END" + vector.print str "TILE END\n" return } diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-read-2d.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-read-2d.mlir index 52f5688..7421521 100644 --- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-read-2d.mlir +++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-read-2d.mlir @@ -14,7 +14,7 @@ func.func @transfer_read_2d(%A : memref<?x?xf32>, %base1: index, %base2: index) %0 = vector.transfer_read %A[%base1, %base2], %pad {in_bounds=[true, true]} : memref<?x?xf32>, vector<[4]x[4]xf32> - vector.print str "TILE BEGIN:" + vector.print str "TILE BEGIN:\n" vector.print %0: vector<[4]x[4]xf32> return @@ -27,7 +27,7 @@ func.func @transfer_read_2d_transposed(%A : memref<?x?xf32>, %base1: index, %bas {permutation_map = affine_map<(d0, d1) -> (d1, d0)>, in_bounds=[true, true]} : memref<?x?xf32>, vector<[4]x[4]xf32> - vector.print str "TILE BEGIN:" + vector.print str "TILE BEGIN:\n" vector.print %0 : vector<[4]x[4]xf32> return @@ -42,7 +42,7 @@ func.func @transfer_read_2d_mask(%A : memref<?x?xf32>, %base1: index, %base2: in %0 = vector.transfer_read %A[%base1, %base2], %pad, %mask {in_bounds = [true, true]} : memref<?x?xf32>, vector<[4]x[4]xf32> - vector.print str "TILE BEGIN:" + vector.print str "TILE BEGIN:\n" vector.print %0: vector<[4]x[4]xf32> return @@ -58,7 +58,7 @@ func.func @transfer_read_2d_mask_transposed(%A : memref<?x?xf32>, %base1: index, {permutation_map = affine_map<(d0, d1) -> (d1, d0)>, in_bounds=[true, true]} : memref<?x?xf32>, vector<[4]x[4]xf32> - vector.print str "TILE BEGIN:" + vector.print str "TILE BEGIN:\n" vector.print %0: vector<[4]x[4]xf32> return @@ -73,7 +73,7 @@ func.func @transfer_read_2d_mask_non_zero_pad(%A : memref<?x?xf32>, %base1: inde %0 = vector.transfer_read %A[%base1, %base2], %pad, %mask {in_bounds = [true, true]} : memref<?x?xf32>, vector<[4]x[4]xf32> - vector.print str "TILE BEGIN:" + vector.print str "TILE BEGIN:\n" vector.print %0: vector<[4]x[4]xf32> return @@ -89,7 +89,7 @@ func.func @transfer_read_2d_mask_non_zero_pad_transposed(%A : memref<?x?xf32>, % {permutation_map = affine_map<(d0, d1) -> (d1, d0)>, in_bounds=[true, true]} : memref<?x?xf32>, vector<[4]x[4]xf32> - vector.print str "TILE BEGIN:" + vector.print str "TILE BEGIN:\n" vector.print %0: vector<[4]x[4]xf32> return diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-write-2d.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-write-2d.mlir index 710cc66..2fef705 100644 --- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-write-2d.mlir +++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-write-2d.mlir @@ -51,7 +51,7 @@ func.func @transfer_write_2d_mask_transposed(%A : memref<?x?xf32>, %base1: index func.func @load_and_print(%A : memref<?x?xf32>, %base1: index, %base2: index) { %0 = vector.load %A[%base1, %base2] : memref<?x?xf32>, vector<[4]x[4]xf32> - vector.print str "TILE BEGIN:" + vector.print str "TILE BEGIN:\n" vector.print %0: vector<[4]x[4]xf32> return diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transpose.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transpose.mlir index 88bc0d0..177c96f 100644 --- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transpose.mlir +++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transpose.mlir @@ -51,9 +51,9 @@ func.func @entry() { // CHECK-NEXT: ( 2, 2, 2, 2 // CHECK-NEXT: ( 3, 3, 3, 3 // CHECK: TILE END - vector.print str "TILE BEGIN" + vector.print str "TILE BEGIN\n" vector.print %tile : vector<[4]x[4]xi32> - vector.print str "TILE END" + vector.print str "TILE END\n" // Dump the transposed tile. The smallest SVL is 128-bits so the tile will be // at least 4x4xi32. @@ -64,9 +64,9 @@ func.func @entry() { // CHECK-NEXT: ( 0, 1, 2, 3 // CHECK-NEXT: ( 0, 1, 2, 3 // CHECK: TILE END - vector.print str "TILE BEGIN" + vector.print str "TILE BEGIN\n" vector.print %transposed_tile : vector<[4]x[4]xi32> - vector.print str "TILE END" + vector.print str "TILE END\n" return } diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/tile_fill.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/tile_fill.mlir index e149174..3d74508 100644 --- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/tile_fill.mlir +++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/tile_fill.mlir @@ -23,9 +23,9 @@ func.func @entry() -> i32 { // CHECK-NEXT: ( 123, 123, 123, 123 // CHECK-NEXT: ( 123, 123, 123, 123 // CHECK: TILE END - vector.print str "TILE BEGIN" + vector.print str "TILE BEGIN\n" vector.print %tile : vector<[4]x[4]xi32> - vector.print str "TILE END" + vector.print str "TILE END\n" %c0_i32 = arith.constant 0 : i32 return %c0_i32 : i32 diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-load-store.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-load-store.mlir index b29790db..48080fd 100644 --- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-load-store.mlir +++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-load-store.mlir @@ -255,7 +255,7 @@ func.func @load_store_two_za_s_tiles() -> i32 { // CHECK-NEXT: ( 1, 1, 1, 1 // CHECK-NEXT: ( 1, 1, 1, 1 // CHECK: TILE END - vector.print str "TILE BEGIN" + vector.print str "TILE BEGIN\n" scf.for %i = %c0 to %size_of_two_tiles step %svl_s { %av = vector.load %mem2[%i] : memref<?xi32>, vector<[4]xi32> vector.print %av : vector<[4]xi32> @@ -263,11 +263,11 @@ func.func @load_store_two_za_s_tiles() -> i32 { %tileSizeMinusStep = arith.subi %size_of_tile, %svl_s : index %isNextTile = arith.cmpi eq, %i, %tileSizeMinusStep : index scf.if %isNextTile { - vector.print str "TILE END" - vector.print str "TILE BEGIN" + vector.print str "TILE END\n" + vector.print str "TILE BEGIN\n" } } - vector.print str "TILE END" + vector.print str "TILE END\n" return %c0_i32 : i32 } |