1 files changed, 164 insertions, 137 deletions
diff --git a/llvm/test/CodeGen/X86/apx/and.ll b/llvm/test/CodeGen/X86/apx/and.ll
index 1f7b694..b7c1a85 100644
--- a/llvm/test/CodeGen/X86/apx/and.ll
+++ b/llvm/test/CodeGen/X86/apx/and.ll
@@ -1,12 +1,12 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s
 
 define i8 @and8rr(i8 noundef %a, i8 noundef %b) {
 ; CHECK-LABEL: and8rr:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    andl %esi, %edi, %eax
+; CHECK-NEXT:    andl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x21,0xf7]
 ; CHECK-NEXT:    # kill: def $al killed $al killed $eax
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
     %and = and i8 %a, %b
     ret i8 %and
@@ -15,9 +15,9 @@ entry:
 define i16 @and16rr(i16 noundef %a, i16 noundef %b) {
 ; CHECK-LABEL: and16rr:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    andl %esi, %edi, %eax
+; CHECK-NEXT:    andl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x21,0xf7]
 ; CHECK-NEXT:    # kill: def $ax killed $ax killed $eax
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
     %and = and i16 %a, %b
     ret i16 %and
@@ -26,8 +26,8 @@ entry:
 define i32 @and32rr(i32 noundef %a, i32 noundef %b) {
 ; CHECK-LABEL: and32rr:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    andl %esi, %edi, %eax
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    andl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x21,0xf7]
+; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
     %and = and i32 %a, %b
     ret i32 %and
@@ -36,8 +36,8 @@ entry:
 define i64 @and64rr(i64 noundef %a, i64 noundef %b) {
 ; CHECK-LABEL: and64rr:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    andq %rsi, %rdi, %rax
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    andq %rsi, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x21,0xf7]
+; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
     %and = and i64 %a, %b
     ret i64 %and
@@ -46,8 +46,8 @@ entry:
 define i8 @and8rm(i8 noundef %a, ptr %b) {
 ; CHECK-LABEL: and8rm:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    andb (%rsi), %dil, %al
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    andb (%rsi), %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x22,0x3e]
+; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
     %t = load i8, ptr %b
     %and = and i8 %a, %t
@@ -57,8 +57,8 @@ entry:
 define i16 @and16rm(i16 noundef %a, ptr %b) {
 ; CHECK-LABEL: and16rm:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    andw (%rsi), %di, %ax
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    andw (%rsi), %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x23,0x3e]
+; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
     %t = load i16, ptr %b
     %and = and i16 %a, %t
@@ -68,8 +68,8 @@ entry:
 define i32 @and32rm(i32 noundef %a, ptr %b) {
 ; CHECK-LABEL: and32rm:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    andl (%rsi), %edi, %eax
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    andl (%rsi), %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x23,0x3e]
+; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
     %t = load i32, ptr %b
     %and = and i32 %a, %t
@@ -79,8 +79,8 @@ entry:
 define i64 @and64rm(i64 noundef %a, ptr %b) {
 ; CHECK-LABEL: and64rm:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    andq (%rsi), %rdi, %rax
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    andq (%rsi), %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x23,0x3e]
+; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
     %t = load i64, ptr %b
     %and = and i64 %a, %t
@@ -90,9 +90,9 @@ entry:
 define i16 @and16ri8(i16 noundef %a) {
 ; CHECK-LABEL: and16ri8:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    andl $123, %edi, %eax
+; CHECK-NEXT:    andl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xe7,0x7b,0x00,0x00,0x00]
 ; CHECK-NEXT:    # kill: def $ax killed $ax killed $eax
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
     %and = and i16 %a, 123
     ret i16 %and
@@ -101,8 +101,8 @@ entry:
 define i32 @and32ri8(i32 noundef %a) {
 ; CHECK-LABEL: and32ri8:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    andl $123, %edi, %eax
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    andl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xe7,0x7b,0x00,0x00,0x00]
+; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
     %and = and i32 %a, 123
     ret i32 %and
@@ -111,8 +111,8 @@ entry:
 define i64 @and64ri8(i64 noundef %a) {
 ; CHECK-LABEL: and64ri8:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    andl $123, %edi, %eax
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    andl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xe7,0x7b,0x00,0x00,0x00]
+; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
     %and = and i64 %a, 123
     ret i64 %and
@@ -121,8 +121,8 @@ entry:
 define i8 @and8ri(i8 noundef %a) {
 ; CHECK-LABEL: and8ri:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    andb $123, %dil, %al
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    andb $123, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0xe7,0x7b]
+; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
     %and = and i8 %a, 123
     ret i8 %and
@@ -131,9 +131,10 @@ entry:
 define i16 @and16ri(i16 noundef %a) {
 ; CHECK-LABEL: and16ri:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    andl $1234, %edi, %eax # imm = 0x4D2
+; CHECK-NEXT:    andl $1234, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xe7,0xd2,0x04,0x00,0x00]
+; CHECK-NEXT:    # imm = 0x4D2
 ; CHECK-NEXT:    # kill: def $ax killed $ax killed $eax
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
     %and = and i16 %a, 1234
     ret i16 %and
@@ -142,8 +143,9 @@ entry:
 define i32 @and32ri(i32 noundef %a) {
 ; CHECK-LABEL: and32ri:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    andl $123456, %edi, %eax # imm = 0x1E240
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    andl $123456, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xe7,0x40,0xe2,0x01,0x00]
+; CHECK-NEXT:    # imm = 0x1E240
+; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
     %and = and i32 %a, 123456
     ret i32 %and
@@ -152,8 +154,9 @@ entry:
 define i64 @and64ri(i64 noundef %a) {
 ; CHECK-LABEL: and64ri:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    andl $123456, %edi, %eax # imm = 0x1E240
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    andl $123456, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xe7,0x40,0xe2,0x01,0x00]
+; CHECK-NEXT:    # imm = 0x1E240
+; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
     %and = and i64 %a, 123456
     ret i64 %and
@@ -162,8 +165,8 @@ entry:
 define i8 @and8mr(ptr %a, i8 noundef %b) {
 ; CHECK-LABEL: and8mr:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    andb %sil, (%rdi), %al
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    andb %sil, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0x20,0x37]
+; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
   %t= load i8, ptr %a
   %and = and i8 %t, %b
@@ -173,8 +176,8 @@ entry:
 define i16 @and16mr(ptr %a, i16 noundef %b) {
 ; CHECK-LABEL: and16mr:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    andw %si, (%rdi), %ax
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    andw %si, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x21,0x37]
+; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
   %t= load i16, ptr %a
   %and = and i16 %t, %b
@@ -184,8 +187,8 @@ entry:
 define i32 @and32mr(ptr %a, i32 noundef %b) {
 ; CHECK-LABEL: and32mr:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    andl %esi, (%rdi), %eax
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    andl %esi, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x21,0x37]
+; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
   %t= load i32, ptr %a
   %and = and i32 %t, %b
@@ -195,8 +198,8 @@ entry:
 define i64 @and64mr(ptr %a, i64 noundef %b) {
 ; CHECK-LABEL: and64mr:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    andq %rsi, (%rdi), %rax
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    andq %rsi, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x21,0x37]
+; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
   %t= load i64, ptr %a
   %and = and i64 %t, %b
@@ -206,10 +209,10 @@ entry:
 define i16 @and16mi8(ptr %a) {
 ; CHECK-LABEL: and16mi8:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    movzwl (%rdi), %eax
-; CHECK-NEXT:    andl $123, %eax
+; CHECK-NEXT:    movzwl (%rdi), %eax # encoding: [0x0f,0xb7,0x07]
+; CHECK-NEXT:    andl $123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xe0,0x7b]
 ; CHECK-NEXT:    # kill: def $ax killed $ax killed $eax
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
   %t= load i16, ptr %a
   %and = and i16 %t, 123
@@ -219,8 +222,8 @@ entry:
 define i32 @and32mi8(ptr %a) {
 ; CHECK-LABEL: and32mi8:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    andl $123, (%rdi), %eax
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    andl $123, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0x27,0x7b,0x00,0x00,0x00]
+; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
   %t= load i32, ptr %a
   %and = and i32 %t, 123
@@ -230,9 +233,9 @@ entry:
 define i64 @and64mi8(ptr %a) {
 ; CHECK-LABEL: and64mi8:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    movq (%rdi), %rax
-; CHECK-NEXT:    andl $123, %eax
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    movq (%rdi), %rax # encoding: [0x48,0x8b,0x07]
+; CHECK-NEXT:    andl $123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xe0,0x7b]
+; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
   %t= load i64, ptr %a
   %and = and i64 %t, 123
@@ -242,8 +245,8 @@ entry:
 define i8 @and8mi(ptr %a) {
 ; CHECK-LABEL: and8mi:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    andb $123, (%rdi), %al
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    andb $123, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0x27,0x7b]
+; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
   %t= load i8, ptr %a
   %and = and i8 %t, 123
@@ -253,10 +256,11 @@ entry:
 define i16 @and16mi(ptr %a) {
 ; CHECK-LABEL: and16mi:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    movzwl (%rdi), %eax
-; CHECK-NEXT:    andl $1234, %eax # imm = 0x4D2
+; CHECK-NEXT:    movzwl (%rdi), %eax # encoding: [0x0f,0xb7,0x07]
+; CHECK-NEXT:    andl $1234, %eax # EVEX TO LEGACY Compression encoding: [0x25,0xd2,0x04,0x00,0x00]
+; CHECK-NEXT:    # imm = 0x4D2
 ; CHECK-NEXT:    # kill: def $ax killed $ax killed $eax
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
   %t= load i16, ptr %a
   %and = and i16 %t, 1234
@@ -266,8 +270,9 @@ entry:
 define i32 @and32mi(ptr %a) {
 ; CHECK-LABEL: and32mi:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    andl $123456, (%rdi), %eax # imm = 0x1E240
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    andl $123456, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0x27,0x40,0xe2,0x01,0x00]
+; CHECK-NEXT:    # imm = 0x1E240
+; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
   %t= load i32, ptr %a
   %and = and i32 %t, 123456
@@ -277,9 +282,10 @@ entry:
 define i64 @and64mi(ptr %a) {
 ; CHECK-LABEL: and64mi:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    movq (%rdi), %rax
-; CHECK-NEXT:    andl $123456, %eax # imm = 0x1E240
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    movq (%rdi), %rax # encoding: [0x48,0x8b,0x07]
+; CHECK-NEXT:    andl $123456, %eax # EVEX TO LEGACY Compression encoding: [0x25,0x40,0xe2,0x01,0x00]
+; CHECK-NEXT:    # imm = 0x1E240
+; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
   %t= load i64, ptr %a
   %and = and i64 %t, 123456
@@ -291,11 +297,12 @@ entry:
 define i1 @andflag8rr(i8 %a, i8 %b) {
 ; CHECK-LABEL: andflag8rr:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    notb %sil, %al
-; CHECK-NEXT:    andb %al, %dil, %cl
-; CHECK-NEXT:    sete %al
-; CHECK-NEXT:    movb %cl, d64(%rip)
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    notb %sil, %al # encoding: [0x62,0xf4,0x7c,0x18,0xf6,0xd6]
+; CHECK-NEXT:    andb %al, %dil, %cl # encoding: [0x62,0xf4,0x74,0x18,0x20,0xc7]
+; CHECK-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
+; CHECK-NEXT:    movb %cl, d64(%rip) # encoding: [0x88,0x0d,A,A,A,A]
+; CHECK-NEXT:    # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %xor = xor i8 %b, -1
   %v0 = and i8 %a, %xor  ; 0xff << 50
   %v1 = icmp eq i8 %v0, 0
@@ -306,11 +313,12 @@ define i1 @andflag8rr(i8 %a, i8 %b) {
 define i1 @andflag16rr(i16 %a, i16 %b) {
 ; CHECK-LABEL: andflag16rr:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    notl %esi, %eax
-; CHECK-NEXT:    andw %ax, %di, %cx
-; CHECK-NEXT:    sete %al
-; CHECK-NEXT:    movw %cx, d64(%rip)
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    notl %esi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0xf7,0xd6]
+; CHECK-NEXT:    andw %ax, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x21,0xc7]
+; CHECK-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
+; CHECK-NEXT:    movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A]
+; CHECK-NEXT:    # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %xor = xor i16 %b, -1
   %v0 = and i16 %a, %xor  ; 0xff << 50
   %v1 = icmp eq i16 %v0, 0
@@ -321,10 +329,11 @@ define i1 @andflag16rr(i16 %a, i16 %b) {
 define i1 @andflag32rr(i32 %a, i32 %b) {
 ; CHECK-LABEL: andflag32rr:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    andl %esi, %edi, %ecx
-; CHECK-NEXT:    sete %al
-; CHECK-NEXT:    movl %ecx, d64(%rip)
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    andl %esi, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x21,0xf7]
+; CHECK-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
+; CHECK-NEXT:    movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A]
+; CHECK-NEXT:    # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %v0 = and i32 %a, %b  ; 0xff << 50
   %v1 = icmp eq i32 %v0, 0
   store i32 %v0, ptr @d64
@@ -334,10 +343,11 @@ define i1 @andflag32rr(i32 %a, i32 %b) {
 define i1 @andflag64rr(i64 %a, i64 %b) {
 ; CHECK-LABEL: andflag64rr:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    andq %rsi, %rdi, %rcx
-; CHECK-NEXT:    sete %al
-; CHECK-NEXT:    movq %rcx, d64(%rip)
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    andq %rsi, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x21,0xf7]
+; CHECK-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
+; CHECK-NEXT:    movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A]
+; CHECK-NEXT:    # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %v0 = and i64 %a, %b  ; 0xff << 50
   %v1 = icmp eq i64 %v0, 0
   store i64 %v0, ptr @d64
@@ -347,11 +357,12 @@ define i1 @andflag64rr(i64 %a, i64 %b) {
 define i1 @andflag8rm(ptr %ptr, i8 %b) {
 ; CHECK-LABEL: andflag8rm:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    notb %sil, %al
-; CHECK-NEXT:    andb (%rdi), %al, %cl
-; CHECK-NEXT:    sete %al
-; CHECK-NEXT:    movb %cl, d64(%rip)
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    notb %sil, %al # encoding: [0x62,0xf4,0x7c,0x18,0xf6,0xd6]
+; CHECK-NEXT:    andb (%rdi), %al, %cl # encoding: [0x62,0xf4,0x74,0x18,0x22,0x07]
+; CHECK-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
+; CHECK-NEXT:    movb %cl, d64(%rip) # encoding: [0x88,0x0d,A,A,A,A]
+; CHECK-NEXT:    # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %a = load i8, ptr %ptr
   %xor = xor i8 %b, -1
   %v0 = and i8 %a, %xor  ; 0xff << 50
@@ -363,11 +374,12 @@ define i1 @andflag8rm(ptr %ptr, i8 %b) {
 define i1 @andflag16rm(ptr %ptr, i16 %b) {
 ; CHECK-LABEL: andflag16rm:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    notl %esi, %eax
-; CHECK-NEXT:    andw (%rdi), %ax, %cx
-; CHECK-NEXT:    sete %al
-; CHECK-NEXT:    movw %cx, d64(%rip)
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    notl %esi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0xf7,0xd6]
+; CHECK-NEXT:    andw (%rdi), %ax, %cx # encoding: [0x62,0xf4,0x75,0x18,0x23,0x07]
+; CHECK-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
+; CHECK-NEXT:    movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A]
+; CHECK-NEXT:    # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %a = load i16, ptr %ptr
   %xor = xor i16 %b, -1
   %v0 = and i16 %a, %xor  ; 0xff << 50
@@ -379,10 +391,11 @@ define i1 @andflag16rm(ptr %ptr, i16 %b) {
 define i1 @andflag32rm(ptr %ptr, i32 %b) {
 ; CHECK-LABEL: andflag32rm:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    andl (%rdi), %esi, %ecx
-; CHECK-NEXT:    sete %al
-; CHECK-NEXT:    movl %ecx, d64(%rip)
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    andl (%rdi), %esi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x23,0x37]
+; CHECK-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
+; CHECK-NEXT:    movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A]
+; CHECK-NEXT:    # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %a = load i32, ptr %ptr
   %v0 = and i32 %a, %b  ; 0xff << 50
   %v1 = icmp eq i32 %v0, 0
@@ -393,10 +406,11 @@ define i1 @andflag32rm(ptr %ptr, i32 %b) {
 define i1 @andflag64rm(ptr %ptr, i64 %b) {
 ; CHECK-LABEL: andflag64rm:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    andq (%rdi), %rsi, %rcx
-; CHECK-NEXT:    sete %al
-; CHECK-NEXT:    movq %rcx, d64(%rip)
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    andq (%rdi), %rsi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x23,0x37]
+; CHECK-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
+; CHECK-NEXT:    movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A]
+; CHECK-NEXT:    # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %a = load i64, ptr %ptr
   %v0 = and i64 %a, %b  ; 0xff << 50
   %v1 = icmp eq i64 %v0, 0
@@ -407,10 +421,11 @@ define i1 @andflag64rm(ptr %ptr, i64 %b) {
 define i1 @andflag8ri(i8 %a) {
 ; CHECK-LABEL: andflag8ri:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    andb $-124, %dil, %cl
-; CHECK-NEXT:    sete %al
-; CHECK-NEXT:    movb %cl, d64(%rip)
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    andb $-124, %dil, %cl # encoding: [0x62,0xf4,0x74,0x18,0x80,0xe7,0x84]
+; CHECK-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
+; CHECK-NEXT:    movb %cl, d64(%rip) # encoding: [0x88,0x0d,A,A,A,A]
+; CHECK-NEXT:    # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %xor = xor i8 123, -1
   %v0 = and i8 %a, %xor  ; 0xff << 50
   %v1 = icmp eq i8 %v0, 0
@@ -421,10 +436,12 @@ define i1 @andflag8ri(i8 %a) {
 define i1 @andflag16ri(i16 %a) {
 ; CHECK-LABEL: andflag16ri:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    andw $-1235, %di, %cx # imm = 0xFB2D
-; CHECK-NEXT:    sete %al
-; CHECK-NEXT:    movw %cx, d64(%rip)
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    andw $-1235, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x81,0xe7,0x2d,0xfb]
+; CHECK-NEXT:    # imm = 0xFB2D
+; CHECK-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
+; CHECK-NEXT:    movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A]
+; CHECK-NEXT:    # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %xor = xor i16 1234, -1
   %v0 = and i16 %a, %xor  ; 0xff << 50
   %v1 = icmp eq i16 %v0, 0
@@ -435,10 +452,12 @@ define i1 @andflag16ri(i16 %a) {
 define i1 @andflag32ri(i32 %a) {
 ; CHECK-LABEL: andflag32ri:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    andl $123456, %edi, %ecx # imm = 0x1E240
-; CHECK-NEXT:    sete %al
-; CHECK-NEXT:    movl %ecx, d64(%rip)
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    andl $123456, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x81,0xe7,0x40,0xe2,0x01,0x00]
+; CHECK-NEXT:    # imm = 0x1E240
+; CHECK-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
+; CHECK-NEXT:    movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A]
+; CHECK-NEXT:    # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %v0 = and i32 %a, 123456  ; 0xff << 50
   %v1 = icmp eq i32 %v0, 0
   store i32 %v0, ptr @d64
@@ -448,10 +467,12 @@ define i1 @andflag32ri(i32 %a) {
 define i1 @andflag64ri(i64 %a) {
 ; CHECK-LABEL: andflag64ri:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    andq $123456, %rdi, %rcx # imm = 0x1E240
-; CHECK-NEXT:    sete %al
-; CHECK-NEXT:    movq %rcx, d64(%rip)
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    andq $123456, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x81,0xe7,0x40,0xe2,0x01,0x00]
+; CHECK-NEXT:    # imm = 0x1E240
+; CHECK-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
+; CHECK-NEXT:    movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A]
+; CHECK-NEXT:    # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %v0 = and i64 %a, 123456  ; 0xff << 50
   %v1 = icmp eq i64 %v0, 0
   store i64 %v0, ptr @d64
@@ -461,10 +482,11 @@ define i1 @andflag64ri(i64 %a) {
 define i1 @andflag16ri8(i16 %a) {
 ; CHECK-LABEL: andflag16ri8:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    andw $-124, %di, %cx
-; CHECK-NEXT:    sete %al
-; CHECK-NEXT:    movw %cx, d64(%rip)
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    andw $-124, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x81,0xe7,0x84,0xff]
+; CHECK-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
+; CHECK-NEXT:    movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A]
+; CHECK-NEXT:    # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %xor = xor i16 123, -1
   %v0 = and i16 %a, %xor  ; 0xff << 50
   %v1 = icmp eq i16 %v0, 0
@@ -475,10 +497,11 @@ define i1 @andflag16ri8(i16 %a) {
 define i1 @andflag32ri8(i32 %a) {
 ; CHECK-LABEL: andflag32ri8:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    andl $123, %edi, %ecx
-; CHECK-NEXT:    sete %al
-; CHECK-NEXT:    movl %ecx, d64(%rip)
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    andl $123, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x81,0xe7,0x7b,0x00,0x00,0x00]
+; CHECK-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
+; CHECK-NEXT:    movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A]
+; CHECK-NEXT:    # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %v0 = and i32 %a, 123  ; 0xff << 50
   %v1 = icmp eq i32 %v0, 0
   store i32 %v0, ptr @d64
@@ -488,10 +511,11 @@ define i1 @andflag32ri8(i32 %a) {
 define i1 @andflag64ri8(i64 %a) {
 ; CHECK-LABEL: andflag64ri8:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    andq $123, %rdi, %rcx
-; CHECK-NEXT:    sete %al
-; CHECK-NEXT:    movq %rcx, d64(%rip)
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    andq $123, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x81,0xe7,0x7b,0x00,0x00,0x00]
+; CHECK-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
+; CHECK-NEXT:    movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A]
+; CHECK-NEXT:    # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %v0 = and i64 %a, 123  ; 0xff << 50
   %v1 = icmp eq i64 %v0, 0
   store i64 %v0, ptr @d64
@@ -501,8 +525,8 @@ define i1 @andflag64ri8(i64 %a) {
 define void @and8mr_legacy(ptr %a, i8 noundef %b) {
 ; CHECK-LABEL: and8mr_legacy:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    andb %sil, (%rdi)
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    andb %sil, (%rdi) # encoding: [0x40,0x20,0x37]
+; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
   %t= load i8, ptr %a
   %and = and i8 %t, %b
@@ -513,8 +537,8 @@ entry:
 define void @and16mr_legacy(ptr %a, i16 noundef %b) {
 ; CHECK-LABEL: and16mr_legacy:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    andw %si, (%rdi)
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    andw %si, (%rdi) # encoding: [0x66,0x21,0x37]
+; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
   %t= load i16, ptr %a
   %and = and i16 %t, %b
@@ -525,8 +549,8 @@ entry:
 define void @and32mr_legacy(ptr %a, i32 noundef %b) {
 ; CHECK-LABEL: and32mr_legacy:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    andl %esi, (%rdi)
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    andl %esi, (%rdi) # encoding: [0x21,0x37]
+; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
   %t= load i32, ptr %a
   %and = and i32 %t, %b
@@ -537,8 +561,8 @@ entry:
 define void @and64mr_legacy(ptr %a, i64 noundef %b) {
 ; CHECK-LABEL: and64mr_legacy:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    andq %rsi, (%rdi)
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    andq %rsi, (%rdi) # encoding: [0x48,0x21,0x37]
+; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
   %t= load i64, ptr %a
   %and = and i64 %t, %b
@@ -549,8 +573,8 @@ entry:
 define void @and8mi_legacy(ptr %a) {
 ; CHECK-LABEL: and8mi_legacy:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    andb $123, (%rdi)
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    andb $123, (%rdi) # encoding: [0x80,0x27,0x7b]
+; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
   %t= load i8, ptr %a
   %and = and i8 %t, 123
@@ -561,8 +585,9 @@ entry:
 define void @and16mi_legacy(ptr %a) {
 ; CHECK-LABEL: and16mi_legacy:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    andw $1234, (%rdi) # imm = 0x4D2
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    andw $1234, (%rdi) # encoding: [0x66,0x81,0x27,0xd2,0x04]
+; CHECK-NEXT:    # imm = 0x4D2
+; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
   %t= load i16, ptr %a
   %and = and i16 %t, 1234
@@ -573,8 +598,9 @@ entry:
 define void @and32mi_legacy(ptr %a) {
 ; CHECK-LABEL: and32mi_legacy:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    andl $123456, (%rdi) # imm = 0x1E240
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    andl $123456, (%rdi) # encoding: [0x81,0x27,0x40,0xe2,0x01,0x00]
+; CHECK-NEXT:    # imm = 0x1E240
+; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
   %t= load i32, ptr %a
   %and = and i32 %t, 123456
@@ -585,8 +611,9 @@ entry:
 define void @and64mi_legacy(ptr %a) {
 ; CHECK-LABEL: and64mi_legacy:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    andq $123456, (%rdi) # imm = 0x1E240
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    andq $123456, (%rdi) # encoding: [0x48,0x81,0x27,0x40,0xe2,0x01,0x00]
+; CHECK-NEXT:    # imm = 0x1E240
+; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
   %t= load i64, ptr %a
   %and = and i64 %t, 123456