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Diffstat (limited to 'llvm/test/CodeGen/RISCV/shrinkwrap.ll')
-rw-r--r--llvm/test/CodeGen/RISCV/shrinkwrap.ll16
1 files changed, 8 insertions, 8 deletions
diff --git a/llvm/test/CodeGen/RISCV/shrinkwrap.ll b/llvm/test/CodeGen/RISCV/shrinkwrap.ll
index 16f062a..4057770 100644
--- a/llvm/test/CodeGen/RISCV/shrinkwrap.ll
+++ b/llvm/test/CodeGen/RISCV/shrinkwrap.ll
@@ -22,7 +22,7 @@ define void @eliminate_restore(i32 %n) nounwind {
; RV32I-SW-NO-NEXT: addi sp, sp, 16
; RV32I-SW-NO-NEXT: ret
; RV32I-SW-NO-NEXT: .LBB0_2: # %if.then
-; RV32I-SW-NO-NEXT: call abort@plt
+; RV32I-SW-NO-NEXT: call abort
;
; RV32I-SW-LABEL: eliminate_restore:
; RV32I-SW: # %bb.0:
@@ -33,7 +33,7 @@ define void @eliminate_restore(i32 %n) nounwind {
; RV32I-SW-NEXT: .LBB0_2: # %if.then
; RV32I-SW-NEXT: addi sp, sp, -16
; RV32I-SW-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; RV32I-SW-NEXT: call abort@plt
+; RV32I-SW-NEXT: call abort
;
; RV32I-SW-SR-LABEL: eliminate_restore:
; RV32I-SW-SR: # %bb.0:
@@ -43,7 +43,7 @@ define void @eliminate_restore(i32 %n) nounwind {
; RV32I-SW-SR-NEXT: ret
; RV32I-SW-SR-NEXT: .LBB0_2: # %if.then
; RV32I-SW-SR-NEXT: call t0, __riscv_save_0
-; RV32I-SW-SR-NEXT: call abort@plt
+; RV32I-SW-SR-NEXT: call abort
;
; RV64I-SW-LABEL: eliminate_restore:
; RV64I-SW: # %bb.0:
@@ -55,7 +55,7 @@ define void @eliminate_restore(i32 %n) nounwind {
; RV64I-SW-NEXT: .LBB0_2: # %if.then
; RV64I-SW-NEXT: addi sp, sp, -16
; RV64I-SW-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; RV64I-SW-NEXT: call abort@plt
+; RV64I-SW-NEXT: call abort
%cmp = icmp ule i32 %n, 32
br i1 %cmp, label %if.then, label %if.end
@@ -83,7 +83,7 @@ define void @conditional_alloca(i32 %n) nounwind {
; RV32I-SW-NO-NEXT: andi a0, a0, -16
; RV32I-SW-NO-NEXT: sub a0, sp, a0
; RV32I-SW-NO-NEXT: mv sp, a0
-; RV32I-SW-NO-NEXT: call notdead@plt
+; RV32I-SW-NO-NEXT: call notdead
; RV32I-SW-NO-NEXT: .LBB1_2: # %if.end
; RV32I-SW-NO-NEXT: addi sp, s0, -16
; RV32I-SW-NO-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
@@ -104,7 +104,7 @@ define void @conditional_alloca(i32 %n) nounwind {
; RV32I-SW-NEXT: andi a0, a0, -16
; RV32I-SW-NEXT: sub a0, sp, a0
; RV32I-SW-NEXT: mv sp, a0
-; RV32I-SW-NEXT: call notdead@plt
+; RV32I-SW-NEXT: call notdead
; RV32I-SW-NEXT: addi sp, s0, -16
; RV32I-SW-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-SW-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
@@ -123,7 +123,7 @@ define void @conditional_alloca(i32 %n) nounwind {
; RV32I-SW-SR-NEXT: andi a0, a0, -16
; RV32I-SW-SR-NEXT: sub a0, sp, a0
; RV32I-SW-SR-NEXT: mv sp, a0
-; RV32I-SW-SR-NEXT: call notdead@plt
+; RV32I-SW-SR-NEXT: call notdead
; RV32I-SW-SR-NEXT: addi sp, s0, -16
; RV32I-SW-SR-NEXT: tail __riscv_restore_1
; RV32I-SW-SR-NEXT: .LBB1_2: # %if.end
@@ -145,7 +145,7 @@ define void @conditional_alloca(i32 %n) nounwind {
; RV64I-SW-NEXT: andi a0, a0, -16
; RV64I-SW-NEXT: sub a0, sp, a0
; RV64I-SW-NEXT: mv sp, a0
-; RV64I-SW-NEXT: call notdead@plt
+; RV64I-SW-NEXT: call notdead
; RV64I-SW-NEXT: addi sp, s0, -16
; RV64I-SW-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-SW-NEXT: ld s0, 0(sp) # 8-byte Folded Reload