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Diffstat (limited to 'llvm/test/CodeGen/RISCV/float-frem.ll')
-rw-r--r--llvm/test/CodeGen/RISCV/float-frem.ll12
1 files changed, 6 insertions, 6 deletions
diff --git a/llvm/test/CodeGen/RISCV/float-frem.ll b/llvm/test/CodeGen/RISCV/float-frem.ll
index 6c15da0..651b1b11 100644
--- a/llvm/test/CodeGen/RISCV/float-frem.ll
+++ b/llvm/test/CodeGen/RISCV/float-frem.ll
@@ -15,21 +15,21 @@
define float @frem_f32(float %a, float %b) nounwind {
; RV32IF-LABEL: frem_f32:
; RV32IF: # %bb.0:
-; RV32IF-NEXT: tail fmodf@plt
+; RV32IF-NEXT: tail fmodf
;
; RV64IF-LABEL: frem_f32:
; RV64IF: # %bb.0:
-; RV64IF-NEXT: tail fmodf@plt
+; RV64IF-NEXT: tail fmodf
;
; RV32IZFINX-LABEL: frem_f32:
; RV32IZFINX: # %bb.0:
-; RV32IZFINX-NEXT: tail fmodf@plt
+; RV32IZFINX-NEXT: tail fmodf
;
; RV64IZFINX-LABEL: frem_f32:
; RV64IZFINX: # %bb.0:
; RV64IZFINX-NEXT: addi sp, sp, -16
; RV64IZFINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; RV64IZFINX-NEXT: call fmodf@plt
+; RV64IZFINX-NEXT: call fmodf
; RV64IZFINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64IZFINX-NEXT: addi sp, sp, 16
; RV64IZFINX-NEXT: ret
@@ -38,7 +38,7 @@ define float @frem_f32(float %a, float %b) nounwind {
; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -16
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; RV32I-NEXT: call fmodf@plt
+; RV32I-NEXT: call fmodf
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret
@@ -47,7 +47,7 @@ define float @frem_f32(float %a, float %b) nounwind {
; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -16
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; RV64I-NEXT: call fmodf@plt
+; RV64I-NEXT: call fmodf
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 16
; RV64I-NEXT: ret