aboutsummaryrefslogtreecommitdiff
path: root/llvm/test/CodeGen/AMDGPU/freeze.ll
diff options
context:
space:
mode:
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/freeze.ll')
-rw-r--r--llvm/test/CodeGen/AMDGPU/freeze.ll240
1 files changed, 238 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/freeze.ll b/llvm/test/CodeGen/AMDGPU/freeze.ll
index ac43806..9a347d7 100644
--- a/llvm/test/CodeGen/AMDGPU/freeze.ll
+++ b/llvm/test/CodeGen/AMDGPU/freeze.ll
@@ -14592,5 +14592,241 @@ define void @freeze_v4i1_vcc(ptr addrspace(1) %ptra, ptr addrspace(1) %ptrb) {
store <4 x i1> %freeze, ptr addrspace(1) %ptrb
ret void
}
-;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
-; GFX8-SDAG: {{.*}}
+
+define double @freeze_fabs_double(float %a, double %b, double %c) {
+; GFX6-SDAG-LABEL: freeze_fabs_double:
+; GFX6-SDAG: ; %bb.0:
+; GFX6-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX6-SDAG-NEXT: v_mov_b32_e32 v5, v0
+; GFX6-SDAG-NEXT: v_add_f64 v[0:1], |v[4:5]|, v[1:2]
+; GFX6-SDAG-NEXT: v_add_f64 v[2:3], |v[4:5]|, v[3:4]
+; GFX6-SDAG-NEXT: v_add_f64 v[0:1], v[0:1], v[2:3]
+; GFX6-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX6-GISEL-LABEL: freeze_fabs_double:
+; GFX6-GISEL: ; %bb.0:
+; GFX6-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX6-GISEL-NEXT: v_and_b32_e32 v5, 0x7fffffff, v0
+; GFX6-GISEL-NEXT: v_add_f64 v[0:1], v[4:5], v[1:2]
+; GFX6-GISEL-NEXT: v_add_f64 v[2:3], v[4:5], v[3:4]
+; GFX6-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[2:3]
+; GFX6-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-SDAG-LABEL: freeze_fabs_double:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_mov_b32_e32 v5, v0
+; GFX7-SDAG-NEXT: v_add_f64 v[0:1], |v[4:5]|, v[1:2]
+; GFX7-SDAG-NEXT: v_add_f64 v[2:3], |v[4:5]|, v[3:4]
+; GFX7-SDAG-NEXT: v_add_f64 v[0:1], v[0:1], v[2:3]
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: freeze_fabs_double:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_and_b32_e32 v5, 0x7fffffff, v0
+; GFX7-GISEL-NEXT: v_add_f64 v[0:1], v[4:5], v[1:2]
+; GFX7-GISEL-NEXT: v_add_f64 v[2:3], v[4:5], v[3:4]
+; GFX7-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[2:3]
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: freeze_fabs_double:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_mov_b32_e32 v5, v0
+; GFX8-SDAG-NEXT: v_add_f64 v[0:1], |v[4:5]|, v[1:2]
+; GFX8-SDAG-NEXT: v_add_f64 v[2:3], |v[4:5]|, v[3:4]
+; GFX8-SDAG-NEXT: v_add_f64 v[0:1], v[0:1], v[2:3]
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: freeze_fabs_double:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_and_b32_e32 v5, 0x7fffffff, v0
+; GFX8-GISEL-NEXT: v_add_f64 v[0:1], v[4:5], v[1:2]
+; GFX8-GISEL-NEXT: v_add_f64 v[2:3], v[4:5], v[3:4]
+; GFX8-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[2:3]
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-GISEL-LABEL: freeze_fabs_double:
+; GFX9-GISEL: ; %bb.0:
+; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-GISEL-NEXT: v_and_b32_e32 v5, 0x7fffffff, v0
+; GFX9-GISEL-NEXT: v_add_f64 v[0:1], v[4:5], v[1:2]
+; GFX9-GISEL-NEXT: v_add_f64 v[2:3], v[4:5], v[3:4]
+; GFX9-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[2:3]
+; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: freeze_fabs_double:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v5, v0
+; GFX10-SDAG-NEXT: v_add_f64 v[0:1], |v[4:5]|, v[1:2]
+; GFX10-SDAG-NEXT: v_add_f64 v[2:3], |v[4:5]|, v[3:4]
+; GFX10-SDAG-NEXT: v_add_f64 v[0:1], v[0:1], v[2:3]
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: freeze_fabs_double:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_and_b32_e32 v5, 0x7fffffff, v0
+; GFX10-GISEL-NEXT: v_add_f64 v[0:1], v[4:5], v[1:2]
+; GFX10-GISEL-NEXT: v_add_f64 v[2:3], v[4:5], v[3:4]
+; GFX10-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[2:3]
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: freeze_fabs_double:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_mov_b32_e32 v5, v0
+; GFX11-SDAG-NEXT: v_add_f64 v[0:1], |v[4:5]|, v[1:2]
+; GFX11-SDAG-NEXT: v_add_f64 v[2:3], |v[4:5]|, v[3:4]
+; GFX11-SDAG-NEXT: v_add_f64 v[0:1], v[0:1], v[2:3]
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: freeze_fabs_double:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_and_b32_e32 v5, 0x7fffffff, v0
+; GFX11-GISEL-NEXT: v_add_f64 v[0:1], v[4:5], v[1:2]
+; GFX11-GISEL-NEXT: v_add_f64 v[2:3], v[4:5], v[3:4]
+; GFX11-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[2:3]
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+ %pv = insertelement <2 x float> poison, float %a, i32 1
+ %d = bitcast <2 x float> %pv to double
+ %r = call double @llvm.fabs.f64(double %d)
+ %fr = freeze double %r
+ %add1 = fadd double %fr, %b
+ %add2 = fadd double %fr, %c
+ %add = fadd double %add1, %add2
+ ret double %add
+}
+
+define <4 x float> @freeze_fabs_v4float(<4 x float> %A, <4 x float> %B) {
+; GFX6-SDAG-LABEL: freeze_fabs_v4float:
+; GFX6-SDAG: ; %bb.0:
+; GFX6-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX6-SDAG-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
+; GFX6-SDAG-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1
+; GFX6-SDAG-NEXT: v_and_b32_e32 v2, 0x7fffffff, v2
+; GFX6-SDAG-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3
+; GFX6-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX6-GISEL-LABEL: freeze_fabs_v4float:
+; GFX6-GISEL: ; %bb.0:
+; GFX6-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX6-GISEL-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
+; GFX6-GISEL-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1
+; GFX6-GISEL-NEXT: v_and_b32_e32 v2, 0x7fffffff, v2
+; GFX6-GISEL-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3
+; GFX6-GISEL-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
+; GFX6-GISEL-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1
+; GFX6-GISEL-NEXT: v_and_b32_e32 v2, 0x7fffffff, v2
+; GFX6-GISEL-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3
+; GFX6-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-SDAG-LABEL: freeze_fabs_v4float:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
+; GFX7-SDAG-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1
+; GFX7-SDAG-NEXT: v_and_b32_e32 v2, 0x7fffffff, v2
+; GFX7-SDAG-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: freeze_fabs_v4float:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
+; GFX7-GISEL-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1
+; GFX7-GISEL-NEXT: v_and_b32_e32 v2, 0x7fffffff, v2
+; GFX7-GISEL-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3
+; GFX7-GISEL-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
+; GFX7-GISEL-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1
+; GFX7-GISEL-NEXT: v_and_b32_e32 v2, 0x7fffffff, v2
+; GFX7-GISEL-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: freeze_fabs_v4float:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
+; GFX8-SDAG-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1
+; GFX8-SDAG-NEXT: v_and_b32_e32 v2, 0x7fffffff, v2
+; GFX8-SDAG-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: freeze_fabs_v4float:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
+; GFX8-GISEL-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1
+; GFX8-GISEL-NEXT: v_and_b32_e32 v2, 0x7fffffff, v2
+; GFX8-GISEL-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3
+; GFX8-GISEL-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
+; GFX8-GISEL-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1
+; GFX8-GISEL-NEXT: v_and_b32_e32 v2, 0x7fffffff, v2
+; GFX8-GISEL-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-GISEL-LABEL: freeze_fabs_v4float:
+; GFX9-GISEL: ; %bb.0:
+; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-GISEL-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
+; GFX9-GISEL-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1
+; GFX9-GISEL-NEXT: v_and_b32_e32 v2, 0x7fffffff, v2
+; GFX9-GISEL-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3
+; GFX9-GISEL-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
+; GFX9-GISEL-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1
+; GFX9-GISEL-NEXT: v_and_b32_e32 v2, 0x7fffffff, v2
+; GFX9-GISEL-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3
+; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: freeze_fabs_v4float:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
+; GFX10-SDAG-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1
+; GFX10-SDAG-NEXT: v_and_b32_e32 v2, 0x7fffffff, v2
+; GFX10-SDAG-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: freeze_fabs_v4float:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
+; GFX10-GISEL-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1
+; GFX10-GISEL-NEXT: v_and_b32_e32 v2, 0x7fffffff, v2
+; GFX10-GISEL-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3
+; GFX10-GISEL-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
+; GFX10-GISEL-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1
+; GFX10-GISEL-NEXT: v_and_b32_e32 v2, 0x7fffffff, v2
+; GFX10-GISEL-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: freeze_fabs_v4float:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
+; GFX11-SDAG-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1
+; GFX11-SDAG-NEXT: v_and_b32_e32 v2, 0x7fffffff, v2
+; GFX11-SDAG-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: freeze_fabs_v4float:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
+; GFX11-GISEL-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1
+; GFX11-GISEL-NEXT: v_and_b32_e32 v2, 0x7fffffff, v2
+; GFX11-GISEL-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3
+; GFX11-GISEL-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
+; GFX11-GISEL-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1
+; GFX11-GISEL-NEXT: v_and_b32_e32 v2, 0x7fffffff, v2
+; GFX11-GISEL-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+ %A0 = call <4 x float> @llvm.fabs.v4f32(<4 x float> %A)
+ %F1 = freeze <4 x float> %A0
+ %A1 = call <4 x float> @llvm.fabs.v4f32(<4 x float> %F1)
+ ret <4 x float> %A1
+}