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-rw-r--r--llvm/lib/Target/RISCV/RISCVISelLowering.cpp6
1 files changed, 2 insertions, 4 deletions
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index ee83f9d..279d8a4 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -21115,12 +21115,10 @@ void RVVArgDispatcher::constructArgInfos(ArrayRef<Type *> TypeList) {
RegisterVT.getVectorElementType() == MVT::i1) {
RVVArgInfos.push_back({1, RegisterVT, true});
FirstVMaskAssigned = true;
- } else {
- RVVArgInfos.push_back({1, RegisterVT, false});
+ --NumRegs;
}
- RVVArgInfos.insert(RVVArgInfos.end(), --NumRegs,
- {1, RegisterVT, false});
+ RVVArgInfos.insert(RVVArgInfos.end(), NumRegs, {1, RegisterVT, false});
}
}
}