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-rw-r--r--llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp b/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
index 6024d9f..3b8234c 100644
--- a/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
@@ -1957,7 +1957,8 @@ bool BitSimplification::genStoreUpperHalf(MachineInstr *MI) {
return false;
const BitTracker::RegisterCell &RC = BT.lookup(RS.Reg);
RegHalf H;
- if (!matchHalf(0, RC, 0, H))
+ unsigned B = (RS.Sub == Hexagon::isub_hi) ? 32 : 0;
+ if (!matchHalf(0, RC, B, H))
return false;
if (H.Low)
return false;