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Diffstat (limited to 'llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp')
-rw-r--r--llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp13
1 files changed, 9 insertions, 4 deletions
diff --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
index 294fc68..3866723 100644
--- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
@@ -4627,10 +4627,15 @@ bool AMDGPUAsmParser::validateDPP(const MCInst &Inst,
if (Src1Idx >= 0) {
const MCOperand &Src1 = Inst.getOperand(Src1Idx);
const MCRegisterInfo *TRI = getContext().getRegisterInfo();
- if (Src1.isImm() ||
- (Src1.isReg() && isSGPR(mc2PseudoReg(Src1.getReg()), TRI))) {
- AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[Src1Idx]);
- Error(Op.getStartLoc(), "invalid operand for instruction");
+ if (Src1.isReg() && isSGPR(mc2PseudoReg(Src1.getReg()), TRI)) {
+ auto Reg = mc2PseudoReg(Inst.getOperand(Src1Idx).getReg());
+ SMLoc S = getRegLoc(Reg, Operands);
+ Error(S, "invalid operand for instruction");
+ return false;
+ }
+ if (Src1.isImm()) {
+ Error(getInstLoc(Operands),
+ "src1 immediate operand invalid for instruction");
return false;
}
}