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author | Wei Xiao <wei3.xiao@intel.com> | 2022-04-05 16:00:46 +0800 |
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committer | Wei Xiao <wei3.xiao@intel.com> | 2022-04-07 15:53:24 +0800 |
commit | 842d0bf93176b9cb1e0d6894a2bbfb32ad33ebb8 (patch) | |
tree | f47569bb6c78419745a347392699875401ccf73c /mlir | |
parent | 674ee4d353ede9bbcb233aeb5e641ef4e17c7897 (diff) | |
download | llvm-842d0bf93176b9cb1e0d6894a2bbfb32ad33ebb8.zip llvm-842d0bf93176b9cb1e0d6894a2bbfb32ad33ebb8.tar.gz llvm-842d0bf93176b9cb1e0d6894a2bbfb32ad33ebb8.tar.bz2 |
[x86] Improve select lowering for smin(x, 0) & smax(x, 0)
smin(x, 0):
(select (x < 0), x, 0) -> ((x >> (size_in_bits(x)-1))) & x
smax(x, 0):
(select (x > 0), x, 0) -> (~(x >> (size_in_bits(x)-1))) & x
The comparison is testing for a positive value, we have to invert the sign
bit mask, so only do that transform if the target has a bitwise 'and not'
instruction (the invert is free).
The transform is performed only when CMP has a single user to avoid
increasing total instruction number.
https://alive2.llvm.org/ce/z/euUnNm
https://alive2.llvm.org/ce/z/37339J
Differential Revision: https://reviews.llvm.org/D123109
Diffstat (limited to 'mlir')
0 files changed, 0 insertions, 0 deletions