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| author | zhanghb97 <hongbin2019@iscas.ac.cn> | 2022-11-11 16:01:05 +0800 |
|---|---|---|
| committer | zhanghb97 <hongbin2019@iscas.ac.cn> | 2022-11-22 17:30:24 +0800 |
| commit | ee82b864f2086f944f046bd00b03f30697403f8a (patch) | |
| tree | f7c313e5d2032fa43673b000526c841cd683c3f3 /mlir/test/lit.site.cfg.py.in | |
| parent | caa9f63022d28cc38bfb85a11a84a6704f6aaa74 (diff) | |
| download | llvm-ee82b864f2086f944f046bd00b03f30697403f8a.zip llvm-ee82b864f2086f944f046bd00b03f30697403f8a.tar.gz llvm-ee82b864f2086f944f046bd00b03f30697403f8a.tar.bz2 | |
[mlir] Initial MLIR VP intrinsic integration test on host and RVV emulator.
This patch adds the initial VP intrinsic integration test on the host backend and RVV emulator. Please see more detailed [discussion on the discourse](https://discourse.llvm.org/t/mlir-vp-ops-on-rvv-backend-integration-test-and-issues-report/66343).
- Run the test cases on the host by configuring the CMake option: `-DMLIR_INCLUDE_INTEGRATION_TESTS=ON`
- Build the RVV environment and run the test cases on RVV QEMU by [this doc](https://gist.github.com/zhanghb97/ad44407e169de298911b8a4235e68497).
Reviewed By: aartbik
Differential Revision: https://reviews.llvm.org/D137816
Diffstat (limited to 'mlir/test/lit.site.cfg.py.in')
| -rw-r--r-- | mlir/test/lit.site.cfg.py.in | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/mlir/test/lit.site.cfg.py.in b/mlir/test/lit.site.cfg.py.in index 5bca43b..e0826e0 100644 --- a/mlir/test/lit.site.cfg.py.in +++ b/mlir/test/lit.site.cfg.py.in @@ -36,12 +36,17 @@ config.intel_sde_executable = "@INTEL_SDE_EXECUTABLE@" config.mlir_run_amx_tests = @MLIR_RUN_AMX_TESTS@ config.mlir_run_arm_sve_tests = @MLIR_RUN_ARM_SVE_TESTS@ config.mlir_run_x86vector_tests = @MLIR_RUN_X86VECTOR_TESTS@ +config.mlir_run_riscv_vector_tests = "@MLIR_RUN_RISCV_VECTOR_TESTS@" config.mlir_run_cuda_tensor_core_tests = @MLIR_RUN_CUDA_TENSOR_CORE_TESTS@ config.mlir_include_integration_tests = @MLIR_INCLUDE_INTEGRATION_TESTS@ config.arm_emulator_executable = "@ARM_EMULATOR_EXECUTABLE@" config.arm_emulator_options = "@ARM_EMULATOR_OPTIONS@" config.arm_emulator_lli_executable = "@ARM_EMULATOR_LLI_EXECUTABLE@" config.arm_emulator_utils_lib_dir = "@ARM_EMULATOR_UTILS_LIB_DIR@" +config.riscv_vector_emulator_executable = "@RISCV_VECTOR_EMULATOR_EXECUTABLE@" +config.riscv_vector_emulator_options = "@RISCV_VECTOR_EMULATOR_OPTIONS@" +config.riscv_emulator_lli_executable = "@RISCV_EMULATOR_LLI_EXECUTABLE@" +config.riscv_emulator_utils_lib_dir = "@RISCV_EMULATOR_UTILS_LIB_DIR@" import lit.llvm lit.llvm.initialize(lit_config, config) |