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author | Aart Bik <ajcbik@google.com> | 2023-04-11 11:42:29 -0700 |
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committer | Aart Bik <ajcbik@google.com> | 2023-04-11 15:37:13 -0700 |
commit | bdea9b960d5b62864b81d84af3c0c8aa58bab0e2 (patch) | |
tree | 4376b872c50cc80abdc45708aec7bfd7f526d565 /mlir/test/lit.site.cfg.py.in | |
parent | 7849967eccebe7b5bb1cbad338dc83e7520e37b2 (diff) | |
download | llvm-bdea9b960d5b62864b81d84af3c0c8aa58bab0e2.zip llvm-bdea9b960d5b62864b81d84af3c0c8aa58bab0e2.tar.gz llvm-bdea9b960d5b62864b81d84af3c0c8aa58bab0e2.tar.bz2 |
[mlir][sparse][gpu] put sparse compiler GPU end-to-end tests back
SM80 flag guards the test for targets that do not support A100 GPUs
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D147863
Diffstat (limited to 'mlir/test/lit.site.cfg.py.in')
-rw-r--r-- | mlir/test/lit.site.cfg.py.in | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/mlir/test/lit.site.cfg.py.in b/mlir/test/lit.site.cfg.py.in index 274dcbc..1013dc8 100644 --- a/mlir/test/lit.site.cfg.py.in +++ b/mlir/test/lit.site.cfg.py.in @@ -39,6 +39,7 @@ config.mlir_run_arm_sve_tests = @MLIR_RUN_ARM_SVE_TESTS@ config.mlir_run_x86vector_tests = @MLIR_RUN_X86VECTOR_TESTS@ config.mlir_run_riscv_vector_tests = "@MLIR_RUN_RISCV_VECTOR_TESTS@" config.mlir_run_cuda_tensor_core_tests = @MLIR_RUN_CUDA_TENSOR_CORE_TESTS@ +config.mlir_run_cuda_sm80_tests = @MLIR_RUN_CUDA_SM80_TESTS@ config.mlir_include_integration_tests = @MLIR_INCLUDE_INTEGRATION_TESTS@ config.arm_emulator_executable = "@ARM_EMULATOR_EXECUTABLE@" config.arm_emulator_options = "@ARM_EMULATOR_OPTIONS@" |