aboutsummaryrefslogtreecommitdiff
path: root/mlir/test/lit.site.cfg.py.in
diff options
context:
space:
mode:
authorKun Wu <kunww@google.com>2023-06-15 17:05:37 +0000
committerKun Wu <kunww@google.com>2023-06-15 17:44:38 +0000
commitb1c683f5c4bcdba18486a3df440db128b3692cca (patch)
treea16953eff7ec0ef3208020aeb3835356949efb0a /mlir/test/lit.site.cfg.py.in
parent1de5de4b730012c2389ce757dc9999f8b475ef42 (diff)
downloadllvm-b1c683f5c4bcdba18486a3df440db128b3692cca.zip
llvm-b1c683f5c4bcdba18486a3df440db128b3692cca.tar.gz
llvm-b1c683f5c4bcdba18486a3df440db128b3692cca.tar.bz2
[mlir][sparse][gpu] enable sm80+ sparsity integration test only when explicitly set
Reviewed By: aartbik Differential Revision: https://reviews.llvm.org/D152966
Diffstat (limited to 'mlir/test/lit.site.cfg.py.in')
-rw-r--r--mlir/test/lit.site.cfg.py.in1
1 files changed, 1 insertions, 0 deletions
diff --git a/mlir/test/lit.site.cfg.py.in b/mlir/test/lit.site.cfg.py.in
index bf3f59b..dc9b9e9 100644
--- a/mlir/test/lit.site.cfg.py.in
+++ b/mlir/test/lit.site.cfg.py.in
@@ -41,6 +41,7 @@ config.mlir_run_x86vector_tests = @MLIR_RUN_X86VECTOR_TESTS@
config.mlir_run_riscv_vector_tests = "@MLIR_RUN_RISCV_VECTOR_TESTS@"
config.mlir_run_cuda_tensor_core_tests = @MLIR_RUN_CUDA_TENSOR_CORE_TESTS@
config.mlir_run_cuda_sm80_tests = @MLIR_RUN_CUDA_SM80_TESTS@
+config.mlir_run_cuda_sm80_lt_tests = @MLIR_RUN_CUDA_SM80_LT_TESTS@
config.mlir_include_integration_tests = @MLIR_INCLUDE_INTEGRATION_TESTS@
config.arm_emulator_executable = "@ARM_EMULATOR_EXECUTABLE@"
config.arm_emulator_options = "@ARM_EMULATOR_OPTIONS@"